Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 901

Table 33-3 describes the SMASK fields.
Bits Name
0–3 — Reserved, should be cleared.
4 F Fault.
0 FAULT status line is ignored.
1 FAULT status line is checked during transmission. If a fault occurs, indication is given in TxBD[F]
and a TXE event is generated in the PIPE.
5 PE Paper error.
0 PERROR status line is ignored.
1 PERROR status line is checked during transmission. If a paper error occurs, indication is given
in TxBD[PE] and a TXE event is generated in the PIPE.
6 S Select error.
0 SELECT status line is ignored.
1 SELECT status line is checked during transmission. If a select error occurs, indication is given in
TxBD[S] and a TXE event is generated in the PIPE.
7 — Reserved, should be cleared.
33.3.2 PIP Receiver Parameter RAM
The PIP receiver uses the parameter RAM mapping shown in
must be initialized before the receiver is enabled; others are initialized or written by the CP. Most software
does not need access to parameter RAM values after initialization because activity centers around the
buffer descriptors.
1
Offset Name
0x00 RBASE
0x02 —
0x04 PFCR
0x05 —
0x06 MRBLR
0x08 RSTATE
0x0C R_PTR
0x10 RBPTR
0x12 R_CNT
Freescale Semiconductor
Table 33-3. SMASK Field Descriptions
Table 33-4. PIP Receiver Parameter RAM Memory Map
Width
Hword PIP Rx BD table base offset from the beginning of dual-port RAM. Initialize
RBASE before enabling the channel. RBASE should be divisible by 8.
Hword Reserved for transmitting
Byte PIP function code. This value appears on AT[1-3] when the associated SDMA
channel accesses memory. Also controls byte ordering for the transfers. See
Section 33.3.1.1, "PIP Function Code Register (PFCR)."
Byte Reserved for transmitting
Hword Maximum receive buffer length
Word Rx internal state
Word Rx internal data pointer
Hword RxBD pointer. Points to the current Rx BD being processed or to the next BD to
be serviced when idle. After reset or when the end of the Rx BD table is reached,
the CP initializes RBPTR to the RBASE value. Most applications should not
modify RBPTR, but it can be updated if the receiver is disabled or if no Rx buffer
is in use.
Hword Rx internal byte count
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Description
Table 33-4. Certain parameter RAM values
Description
Parallel Interface Port (PIP)
33-5