Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 301

Powerquicc family
Table of Contents

Advertisement

Number
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16-31
10.5.3
SIU Interrupt Processing
Figure 10-8
shows the general flow of SIU interrupt processing.
Freescale Semiconductor
Table 10-7. Priority of SIU Interrupt Sources
Priority Level
Interrupt Source
Highest
Lowest
SIU interrupt occurs
Set bit in SIPEND
Bit set in SIMASK
Assert external interrupt
to core
Figure 10-8. SIU Interrupt Processing
MPC885 PowerQUICC Family Reference Manual, Rev. 2
IRQ0
Internal Level 0
IRQ1
Internal Level 1
IRQ2
Internal Level 2
IRQ3
Internal Level 3
IRQ4
Internal Level 4
Internal Level 5
IRQ6
Internal Level 6
IRQ7
Internal Level 7
Reserved
Start
Bit not set in SIMASK
End
System Interface Unit
Interrupt Code
(SIVEC[INTC])
0000_0000
0000_0100
0000_1000
0000_1100
0001_0000
0001_0100
0001_1000
0001_1100
0010_0000
0010_0100
0010_1000
0010_1100
0011_0000
0011_0100
0011_1000
0011_1100
10-13

Advertisement

Table of Contents
loading

This manual is also suitable for:

Powerquicc mpc870Powerquicc mpc880Powerquicc mpc875

Table of Contents