Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 135

Powerquicc family

Table of Contents

MPC8xx Microprocessor Module

Intended Audience

This part is intended for users who need to understand the programming model of the embedded

microprocessor. It assumes some familiarity with RISC architectures.

This part describes the MPC8xx microprocessor embedded in the MPC885. It provides detailed

information about the registers and instructions that are implemented, the memory management unit

(MMU), cache model, exception model, and an overview of instruction timing. It contains the following

Chapter 3, "The MPC8xx Core,"

described in further detail in subsequent chapters in Part II."

Chapter 4, "MPC8xx Core Register Set,"

MPC885 core. These include both architecturally-defined and MPC885-specific registers.

Chapter 5, "MPC885 Instruction Set,"

These instructions are organized by the level of architecture in which they are

implemented—UISA, VEA, and OEA.

Chapter 6, "Exceptions,"

Chapter 7, "Instruction and Data Caches,"

data caches, cache control, various cache operations, and the interaction between the caches, the

load/store unit (LSU), the instruction sequencer, and the system interface unit (SIU).

Chapter 8, "Memory Management Unit,"

MPC885. Although the MPC885 MMU is based on the PowerPC MMU model, it differs greatly

in many respects, which are described in this chapter.

Chapter 9, "Instruction Execution Timing,"

ways to take greatest advantage of its RISC architecture characteristics, such as pipelining and

parallel execution. It includes a table of instruction latencies and lists dependencies and potential

bottlenecks.

Freescale Semiconductor

provides an overview of the MPC885 core, summarizing topics

describes the hardware registers accessible to the

describes the instructions implemented by the MPC885.

describes the exception model implemented on the MPC885.

describes the organization of the on-chip instruction and

describes how the MMU is implemented on the

describes the MPC885 instruction unit, and provides

MPC885 PowerQUICC Family Reference Manual, Rev. 2