Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 390

External Bus Interface
Receives Bus Grant (BG) from arbiter
Asserts Bus Busy (BB) if no other master is driving
Asserts Transfer Start (TS)
Drives address and attributes
Drives BURST asserted
Asserts Burst Data in Progress (BDIP)
Negates Burst Data in Progress (BDIP)
13-16
MASTER
Bus Request (BR)
Receives data
Receives data
Receives Data
Receives data
Figure 13-11. Basic Flow of a Burst-Read Cycle
MPC885 PowerQUICC Family Reference Manual, Rev. 2
SLAVE
Receives address
Returns data
Asserts Transfer Acknowledge (TA)
No
BDIP asserted
?
Yes
Returns data
Asserts Transfer Acknowledge (TA)
No
BDIP asserted
?
Yes
Returns data
Asserts Transfer Acknowledge (TA)
No
BDIP asserted
?
Yes
Returns data
Asserts Transfer Acknowledge (TA)
No
BDIP asserted
?
Yes
Don't drive
data
Don't drive
data
Don't drive
data
Don't drive
data
Freescale Semiconductor