Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 371

from oscillating when the buffer is driving high. This is because the buffer reactivates if the voltage ever
dips below the logic high threshold while the buffer is enabled as an output. Furthermore, the external logic
must not attempt to drive these signals low while active pull-up buffers are enabled as outputs because the
buffers will reactivate and drive high. This would result in a buffer fight and possible damage to the
MPC885, the system, or both.
Figure 12-5 compares three-state buffers and active pull-up buffers graphically in general terms. It makes
no implication as to which edges trigger which events for any particular signal.
Three-State
Buffer
Active
Pull-Up
Buffer
Note: Events 1 and 4 can be in quick succession.
Figure 12-5. Three-State Buffers and Active Pull-Up Buffers
Table 12-4 summarizes when active pull-up drivers are enabled as outputs.
Signal
TS, BB When the MPC885 is the external bus master throughout the entire bus cycle
BI When the MPC885 memory controller responds to the access on the external bus throughout the entire bus
cycle
TA When the MPC885 memory controller responds to the access on the external bus:
• For chip-selects controlled by the GPCM set for external TA, the TA buffer is not enabled as an output.
• For chip-selects controlled by the GPCM set to terminate in n wait-states, TA is enabled as an output on
cycle (n-1) and driven high, then is driven low on cycle n, terminating the bus transaction. External logic
can drive TA at any point before this, thus terminating the cycle early. (For example, assume the GPCM
is programmed to drive TA after 15 cycles. If external logic drives TA before 14 clocks have elapsed then
the TA is accepted by the processor as a cycle termination.)
• For UPM-controlled chip-selects, the TA buffer is enabled as an output throughout the entire bus cycle.
Freescale Semiconductor
1
2
3
1 2
Table 12-4. Active Pull-Up Resistors Enabled as Outputs
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Legend:
1-Drive high on one edge
2-Switch to Hi-Z on later edge
3
3-Pull-up resistor maintains
logic high state
Legend:
1-Drive high on one edge
2-Switch to Hi-Z when
threshold voltage
5
(Voh + margin) is reached
3-Pull-up resistor maintains
logic high state
4-Disable buffer as output
4 5-Pull-up resistor maintains
logic high state; other
driver can drive signal
Description
External Signals
12-41