Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 104

MPC885 Overview
— Allows dynamic changes
— On the MPC885, can be internally connected to four serial channels (two SCCs and two SMCs)
• Parallel interface port (PIP)
— Centronics interface support
— Supports fast connection between compatible ports on the MPC885 family and other MPC8xx
devices.
• PCMCIA interface
— Master (socket) interface, release 2.1 compliant
— Supports two independent PCMCIA sockets (MPC875 and MPC870 support only one
PCMCIA socket)
— Eight memory or I/O windows supported
• Debug interface
— Eight comparators: four operate on instruction address, two operate on data address, and two
operate on data
— Supports conditions: =, ≠, <, >
— Each watchpoint can generate a breakpoint internally
• Normal high and normal low power modes to conserve power
• 1.8-V core and 3.3-V I/O operation with 5-V TTL compatibility
• The MPC885/MPC880 comes in a 357-pin ball grid array (PBGA) package and the
MPC875/MPC870 comes in a 256-pin ball grid array
The MPC885 family is comprised of three modules that each use the 32-bit internal bus: the MPC8xx core,
the system integration unit (SIU), and the communication processor module (CPM).
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MPC885 PowerQUICC Family Reference Manual, Rev. 2
Freescale Semiconductor