Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 62

Figure
Number
39-7 Example FMC to BRC Turn-around................................................................................... 39-11
39-8 PM Table ............................................................................................................................. 39-12
39-9 Host-controlled Switching Serial ATM to a UTOPIA Channel.......................................... 39-15
39-10 PTP Switching Serial ATM to a UTOPIA Channel ............................................................ 39-16
39-11 PTP Buffer Descriptor......................................................................................................... 39-17
39-12 Statistics Table .................................................................................................................... 39-19
39-13 Address Mapping Tables for Internal Channels in Multi-PHY Operation ......................... 39-20
39-14 CP Command Register (CPCR) (ATM-Specific) ............................................................... 39-22
40-1 APC in UTOPIA Mode—Transmit Flow ............................................................................. 40-2
40-2 APC Control: PTP Queue and Scheduling Table Combination ............................................ 40-3
40-3 MPC885 VBR Credit Mechanism ........................................................................................ 40-8
40-4 Example of Single PHY and Single Serial APC Configuration ......................................... 40-11
40-5 Example of Maximum Multi-PHY and Multi-Serial APC Configuration.......................... 40-11
40-6 APC Scheduling Tables....................................................................................................... 40-13
40-7 PHY Transmit Queue .......................................................................................................... 40-14
40-8 MPHY Pointing Table and APC Priority Levels ................................................................ 40-15
40-9 Example of Three APC Priority Levels Combining
APC Scheduling Tables and APC PTP queues .............................................................. 40-21
41-1 ATM Interrupt Queue............................................................................................................ 41-1
41-2 UTOPIA Event Register (IDSR1) and Mask Register (IDMR1).......................................... 41-2
41-3 Serial ATM Event Register (SCCE) and Mask Register (SCCM)........................................ 41-3
41-4 Interrupt Queue Entry ........................................................................................................... 41-4
41-5 Interrupt Queue Mask (IMASK)........................................................................................... 41-6
42-1 Port D Pin Assignment Register (PDPAR) ........................................................................... 42-1
42-2 System Clock Control Register (SCCR) ............................................................................... 42-3
42-3 Serial ATM Mode Register (PSMR) ..................................................................................... 42-8
43-1 UTOPIA mode register (UTMODE) .................................................................................... 43-2
43-2 UTOPIA Slave Interface with Split Bus ............................................................................... 43-6
43-3 UTOPIA Master Interface with Muxed Bus ......................................................................... 43-7
44-1 Transmit Packet Descriptor (TPD)........................................................................................ 44-6
44-2 AAL2_Tx_Queue Example .................................................................................................. 44-7
44-3 AAL2 Transmit Connection Table........................................................................................ 44-8
44-4 Example of the Transmit Data Flow of an AAL2 Channel................................................. 44-10
44-5 Example of the Wait Table .................................................................................................. 44-13
44-6 Receive Packet Descriptor (RPD)....................................................................................... 44-14
44-7 AAL2_Rx_Queue Example ................................................................................................ 44-16
44-8 AAL2 Receive Connection Table ....................................................................................... 44-17
44-9 Example of the Receive Data Flow of an AAL2 Channel .................................................. 44-19
44-10 AAL2 Parameter RAM ....................................................................................................... 44-21
44-11 Example Using the External CT Pointer Table to Allocate AAL2 CTs.............................. 44-24
44-12 AAL2-Specific Exception Entry Format ............................................................................ 44-25
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Figures
Title
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Page
Number
Freescale Semiconductor