Table 14-10
describes PLPRCR[CSR] and DER[CHSTPE] bit combinations.
Table 14-10. PLPRCR[CSR] and DER[CHSTPE] Bit Combinations
PLPRCR[CSR]
0
0
0
0
1
1
1
1
Freescale Semiconductor
DER[CHSTPE]
Checkstop Mode
0
No
0
Yes
1
No
1
Yes
0
No
0
Yes
1
No
1
Yes
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Clocks and Power Control
Result
—
—
—
Enter debug mode
—
Automatic reset
—
Enter debug mode
14-23