Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 978

Powerquicc family

Table of Contents

Buffer Descriptors and Connection Tables

Figure 37-4. ATM RxBD in Expanded Cell Mode (UTOPIA Only)

describes the ATM RxBD fields.

DATA LENGTH/CHANNEL CODE

Table 37-1. ATM RxBD Field Descriptions

Empty. Determines whether a buffer is accessible by the CPU core or the CP.

0 The data buffer associated with this RxBD has been filled with the received data, or data

reception has been aborted due to an error condition. The CPU core is free to examine

or write to this RxBD and buffer. The CP will not access a BD while the E-bit is cleared.

1 The data buffer associated with this RxBD is empty, or reception is currently in progress.

This RxBD and its associated receive buffer are in use by the CP. Once the E bit is set,

the CPU core should not write to this RxBD.

Reserved, should be cleared during initialization.

Wrap. Determines that this is the final BD in the table.

0 This is not the last BD in the RxBD table.

1 This is the last BD in the RxBD table. The next time this channel receives data, the first

BD in the channel's RxBD table (the BD pointed to by the channels's RCT[RBASE]

address) will be used. The number of RxBDs in this table is programmable and is

determined only by the W bit.

Interrupt. Enables RXB interrupts when a receive buffer is closed during receipt of an

AAL5 frame buffer or an AAL0 buffer. Note that RXF (receive AAL5 frame) interrupts are

not affected by this bit.

0 No interrupt is generated after this buffer has been used.

1 Interrupt occurs after this buffer has been closed by the ATM controller. This class of

interrupt is indicated through the setting of the RXB bit in an entry in the interrupt queue.

MPC885 PowerQUICC Family Reference Manual, Rev. 2

RX DATA BUFFER POINTER

CELL HEADER EXPANSION 1

CELL HEADER EXPANSION 2

CELL HEADER EXPANSION 3

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