Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 878

Universal Serial Bus (USB)
31.15 USB Function Controller Initialization Example
The following is an example initialization sequence for the USB controller operating in function mode. It
can be used to set up four function endpoints (0–3) to fill transmit FIFOs so that data is ready for
transmission when an IN token is received from the USB. The token can be generated using a USB traffic
generator.
1. Enable CLK2 on proper cpm port. CLK2 frequency should be 48 Mhz.
2. Program SICR to connect CLK2 to the USB controller: program SICR[R4CS] to 101.
3. Clear cpm ports to select USBRXD and USBOE.
4. Clear cpm ports to select USBRXP and USBRXN.
5. Set cpm ports to select USBTXP and USBTXN.
6. Clear FRAME_N.
7. Write (DPRAM+0x500) to EP0PTR, (DPRAM+0x520) to EP1PTR, (DPRAM+0x540) to
EP2PTR, and (DPRAM+0x560) to EP3PTR to set up the endpoint pointers.
8. Write 0xBC80_0004 to DPRAM+0x20 to set up the TxBD[Status and Control, Data Length] fields
of endpoint 0.
9. Write DPRAM+0x200 to DPRAM+0x24 to set up the TxBD[Buffer Pointer] field of endpoint 0.
10. Write 0xBCC0_0004 to DPRAM+0x28 to set up the TxBD[Status and Control, Data Length] fields
of endpoint 1.
11. Write DPRAM+0x210 to DPRAM+0x2C to set up the TxBD[Buffer Pointer] field of endpoint 1.
12. Write 0xBC80_0004 to DPRAM+0x30 to set up the TxBD[Status and Control, Data Length] fields
of endpoint 2.
13. Write DPRAM+0x220 to DPRAM+0x34 to set up the TxBD[Buffer Pointer] field of endpoint 2.
14. Write 0xBCC0_0004 to DPRAM+ 0x38 to set up the TxBD[Status and Control, Data Length]
fields of endpoint 3.
15. Write DPRAM+0x230 to DPRAM+0x3C to set up the TxBD[Buffer Pointer] field of endpoint 3.
16. Write 0xCAFE_CAFE to DPRAM+0x200 to set up the endpoint 0 Tx data pattern.
17. Write 0xFACE_FACE to DPRAM+0x210 to set up the endpoint 1 Tx data pattern.
18. Write 0xBACE_BACE to DPRAM+0x220 to set up the endpoint 2 Tx data pattern.
19. Write 0xCACE_CACE to DPRAM+0x230 to set up the endpoint 3 Tx data pattern.
20. Write 0x2000_2020 to DPRAM+0x500 to set up the RBASE and TBASE fields of the endpoint 0
parameter RAM.
21. Write 0x1818_0100 to DPRAM+0x504 to set up the RFCR, TFCR, and MRBLR fields of the
endpoint 0 parameter RAM.
22. Write 0x2000_2020 to DPRAM+0x508 to set up the RBPTR and TBPTR fields of the endpoint 0
parameter RAM.
23. Clear the TSTATE field of the endpoint 0 parameter RAM.
24. Write 0x2008_2028 to DPRAM+0x520 to set up the RBASE and TBASE fields of the endpoint 1
parameter RAM.
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MPC885 PowerQUICC Family Reference Manual, Rev. 2
Freescale Semiconductor