Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 410

External Bus Interface
MPC885
External Bus
Interface
Iwarx
S
R
CLKOUT
The MPC885 samples CR at the rising edge of CLKOUT. When CR is asserted, the reservation flag is
reset. The external bus interface samples the logical value of the reservation flag before externally starting
a bus cycle initiated by a stwcx. instruction in the core. If the reservation flag is set, the external bus
interface begins the bus cycle and if it is reset, no bus cycle is initiated externally and this situation is
reported to the core.
13.4.9.2 Kill Reservation (KR)
KR is a bused signal. In order to use it, the reservation logic must only remember that one of the bus
masters has a reservation for a particular address. If another bus master writes to the address with an
instruction other than stwcx., the reservation logic remembers that the reservation for that address was lost.
When the master with the reservation subsequently attempts an stwcx. instruction to that address, the
reservation logic responds to that external bus cycle with KR.
Note that for burst transactions, KR should be asserted externally only on the first or last beats. Assertion
of KR on an intermediate beat may result in erratic operation, including lockup of the MPC885 requiring
hard reset.
Figure 13-28 shows the reservation protocol for a multi-level (local) bus. The system describes a situation
in which the reserved location is in the remote bus.
13-36
AT[0:3], RSV, R/W, TS
Q
Enable
External
stwcx.
Access CR
Figure 13-27. Reservation On Local Bus
MPC885 PowerQUICC Family Reference Manual, Rev. 2
External Bus
A[0:31]
CR
Reservation
Logic
Other
Bus
Master
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