Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 174

MPC885 Instruction Set
An MPC8xx processor invokes the illegal instruction error handler (part of the program exception) when
the unimplemented instructions are encountered so they may be emulated in software, as required.
A defined instruction can have invalid forms, as described in the following section.
5.2.1.3 Illegal Instruction Class
Illegal instructions can be grouped into the following categories:
• Instructions that are not implemented in the architecture. These opcodes are available for future
extensions of the architecture; that is, future versions of the architecture may define any of these
instructions to perform new functions.
The following primary opcodes are defined as illegal, but may be used in future extensions to the
architecture:
1, 4, 5, 6, 9, 22, 56, 57, 60, 61
• Instructions that are not implemented in a specific MPC8xx implementation. For example,
instructions that can be executed on 64-bit processors are considered illegal by 32-bit processors.
The following primary opcodes are defined for 64-bit implementations only and are illegal on the
MPC885:
2, 30, 58, 62
• All unused extended opcodes are illegal. The unused extended opcodes can be determined from
information in Section A.2, "Instructions Sorted by Opcode," in the Programming Environments
Manual and Section 5.2.1.4, "Reserved Instruction Class."
instructions that are defined only for 64-bit implementations are illegal in 32-bit implementations,
and vice versa.
The following primary opcodes have unused extended opcodes.
17, 19, 31, 59, 63 (primary opcodes 30 and 62 are illegal for all 32-bit implementations, but as
64-bit opcodes they have some unused extended opcodes)
• An instruction consisting entirely of zeros is guaranteed to be an illegal instruction. This increases
the probability that an attempt to execute data or uninitialized memory invokes the system illegal
instruction error handler (a program exception). Note that if only the primary opcode consists of
all zeros, the instruction is considered a reserved instruction. This is further described in
Section 5.2.1.4, "Reserved Instruction Class."
An attempt to execute an illegal instruction invokes the illegal instruction error handler (a program
exception) but has no other effect. See
information about illegal and invalid instruction exceptions.
With the exception of the instruction consisting entirely of binary zeros, the illegal instructions are
available for further additions to the architecture.
5.2.1.4 Reserved Instruction Class
Reserved instructions are allocated to specific implementation-dependent purposes not defined by the
architecture. An attempt to execute an unimplemented reserved instruction invokes the illegal instruction
5-4
Section 6.1.2.7, "Program Exception (0x00700),"
MPC885 PowerQUICC Family Reference Manual, Rev. 2
Notice that extended opcodes for
for additional
Freescale Semiconductor