Freescale Semiconductor PowerQUICC MPC885 Reference Manual page 86

— Chapter 24, "SCC AppleTalk Mode,"
set of protocols developed by Apple Computer, Inc. to provide a LAN service between
Macintosh computers and printers.
— Chapter 25, "SCC Asynchronous HDLC Mode and IrDA,"
and IrDA use of HDLC framing techniques with UART-type characters.
— Chapter 26, "SCC BISYNC Mode,"
byte-oriented BISYNC protocol developed by IBM for use in networking products.
— Chapter 27, "SCC Ethernet Mode,"
protocol.
— Chapter 28, "SCC Transparent Mode,"
mode (also called totally transparent mode), which provides a clear channel on which the SCC
can send or receive serial data without bit-level manipulation.
— Chapter 29, "Serial Management Controllers (SMCs),"
controllers, full-duplex ports that can be configured independently to support one of three
protocols—UART, transparent, or general-circuit interface (GCI).
— Chapter 30, "Serial Peripheral Interface (SPI),"
allows the MPC885 to exchange data between other MPC885 chips, the MC68360, the
MC68302, the M68HC11 and M68HC05 microcontroller families, and peripheral devices such
as EEPROMs, real-time clocks, A/D converters, and ISDN devices.
— Chapter 31, "Universal Serial Bus (USB),"
universal serial bus (USB) controller.
— Chapter 32, "I2C Controller,"
®
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circuit (I C ) controller, which allows data to be exchanged with other I
microcontrollers, EEPROMs, real-time clock devices, and A/D converters.
— Chapter 33, "Parallel Interface Port (PIP),"
data to be sent to and from the MPC885 over 8 or 16 parallel data lines with two handshake
control signals.
— Chapter 34, "Parallel I/O Ports,"
Each signal in the I/O ports can be configured as a general-purpose I/O signal or as a signal
dedicated to supporting communications devices, such as SMCs and SCCs.
— Chapter 35, "CPM Interrupt Controller,"
accepts and prioritizes the internal and external interrupt requests from the CPM blocks and
passes them to the system interface unit (SIU). The CPIC also provides a vector during the core
interrupt acknowledge cycle.
• Part VI, "Asynchronous Transfer Mode (ATM),"
consists of the following chapters:
— Chapter 36, "ATM Overview,"
implementation, which adds major new features available in enhanced SAR (ESAR) mode,
including multiple APC priority levels, port-to-port switching, simultaneous MII (100Base-T)
and UTOPIA (half-duplex) capability, relocatable UTOPIA-level-2-compliant interface with
added FIFO buffering to reduce the total cell transmission time.
lxxxvi
describes the MPC885 implementation of AppleTalk, a
describes the MPC885 implementation of the
describes the MPC885 implementation of the Ethernet
describes the MPC885 implementation of transparent
describes the MPC885 implementation of the inter-integrated
describes the four general-purpose I/O ports—A, B, C, and D.
gives a high-level description of the MPC885 ATM
MPC885 PowerQUICC Family Reference Manual, Rev. 2
describes the asynchronous HDLC
describes two serial management
describes the serial peripheral interface, which
describes the MPC885 implementation of the
describes the parallel interface port which allows
describes how the CPM interrupt controller (CPIC)
describes the MPC885 ATM implementation. It
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C devices, such as
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