Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1211

ADSP-SC58x ACM Register Descriptions
Status Register
The register indicates the ACM event that is currently being serviced, pending events, missed events,
ACM_STAT
and missed triggers.
CEVNT (R)
Current Event
ECOM1 (R)
Event Completion 1
ECOM0 (R)
Event Completion 0
Figure 24-23: ACM_STAT Register Diagram
Table 24-14: ACM_STAT Register Fields
Bit No.
(Access)
7:4 CEVNT
(R/NW)
3 ECOM1
(R/NW)
2 ECOM0
(R/NW)
24–44
15 14 13 12 11 10
0 0 0 0 0 0
31 30 29 28 27 26
0 0 0 0 0 0
Bit Name
Current Event.
The ACM_STAT.CEVNT bits indicate to which event (0 through 15) the ongoing ac-
cess (current event, if any) corresponds.
Event Completion 1.
The ACM_STAT.ECOM1 bit indicates TMR1 event completion for all enabled ACM
TMR1 events and the current trigger. The ACM clears this bit with each trigger.
Event Completion 0.
The ACM_STAT.ECOM0 bit indicates TMR0 event completion for all enabled ACM
TMR0 events and the current trigger. The ACM clears this bit with each trigger.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
9 8 7 6 5 4 3 2
0 0 0 0 0 0 0 0
25 24 23 22 21 20 19 18
0 0 0 0 0 0 0 0
Description/Enumeration
0 Current Event Correspond to Event 0
1 Current Event Correspond to Event 1
15 Current Event Correspond to Event 15
0 No Status
1 ACM TMR1 Events Complete
0 No Status
1 ACM TMR0 Events Complete
1 0
0 0
BSY (R)
Busy
EMISS (R)
Event(s) Missed
17 16
0 0