Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1199

ADSP-SC58x ACM Register Descriptions
Table 24-10: ACM_EVSTAT Register Fields (Continued)
Bit No.
(Access)
16 ECOM0S
(R/W1C)
15 EV15
(R/W1C)
14 EV14
(R/W1C)
13 EV13
(R/W1C)
12 EV12
(R/W1C)
24–32
Bit Name
Event Complete 0 Status.
The ACM_EVSTAT.ECOM0S bit indicates the state of the ACM_STAT.ECOM0 bit.
If set and the corresponding bit in
tion generates an interrupt. This bit is W1C and is not cleared by a trigger.
Event 15 Status.
The ACM_EVSTAT.EV15 bit indicates when the ACM has completed the conver-
sion for event 15. If set and the corresponding bit in
enabled), the condition generates an interrupt. This bit is W1C.
Event 14 Status.
The ACM_EVSTAT.EV14 bit indicates when the ACM has completed the conver-
sion for event 14. If set and the corresponding bit in
enabled), the condition generates an interrupt. This bit is W1C.
Event 13 Status.
The ACM_EVSTAT.EV13 bit indicates when the ACM has completed the conver-
sion for event 13. If set and the corresponding bit in
enabled), the condition generates an interrupt. This bit is W1C.
Event 12 Status.
The ACM_EVSTAT.EV12 bit indicates when the ACM has completed the conver-
sion for event 12. If set and the corresponding bit in
enabled), the condition generates an interrupt. This bit is W1C.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description/Enumeration
ACM_EVMSK is set (interrupt enabled), the condi-
0 No Status
1 ACM_STAT.ECOM0 =1 Occurred
ACM_EVMSK
0 No Event 15 Conversion
1 Event 15 Conversion Done
ACM_EVMSK
0 No Event 14 Conversion
1 Event 14 Conversion Done
ACM_EVMSK
0 No Event 13 Conversion
1 Event 13 Conversion Done
ACM_EVMSK
0 No Event 12 Conversion
1 Event 12 Conversion Done
is set (interrupt
is set (interrupt
is set (interrupt
is set (interrupt