Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1230

Sharc+ processor
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Data Transfer Modes
• The identifier bits
• The control field CAN_MB[nn]_LENGTH.DLC (data length count)
• The remote transmission request (CAN_MB[nn]_ID1.RTR) bit
Only configurable mailboxes MB8–MB23 can process remote frames, but all mailboxes can receive and transmit
remote frame requests. The
dling. All content of a mailbox is always overwritten by an incoming message.
If a remote frame is received, the DLC of the corresponding mailbox is overwritten with the received val-
NOTE:
ue.
Erroneous behavior can result when the CAN_RFH1.MB bit is changed while the corresponding mailbox is process-
ing. To avoid the risk of inconsistent messages, programs must temporarily disable the mailbox while its data regis-
ters are updating.
Temporarily Disabling CAN Mailbox
If a mailbox is enabled and configured to transmit, monitor the write accesses to the data field to avoid transmitting
inconsistent messages. Be careful if the mailbox is transmitting (or attempting to transmit) repeatedly. Also, if this
mailbox is used for automatic remote frame handling, the data field must be updated without losing an incoming
remote request frame and without sending inconsistent data. Therefore, the CAN controller allows for temporarily
disabling the mailbox using the mailbox temporary disable register (CAN_MBTD).
The pointer to the requested mailbox to the CAN_MBTD.TDPTR field is written, and the CAN_MBTD.TDR bit is
set. Internal logic then sets the corresponding CAN_MBTD.TDA flag.
If a mailbox is configured as transmit
field of that mailbox can be updated. If there is an incoming remote request frame while the mailbox is temporarily
disabled,
• Internal logic sets the corresponding transmit request bit (CAN_TRS1.MB), and
• The data length code (DLC) of the incoming message is written to the corresponding mailbox.
However, the requested message is not sent until the CAN_MBTD.TDR bit is cleared. Similarly, all transmit requests
for temporarily disabled mailboxes are ignored until the CAN_MBTD.TDR bit is cleared. Additionally, transmission
of a message immediately aborts when the mailbox is temporarily disabled and the corresponding transmission re-
quest reset (CAN_TRR1.MB) bit for this mailbox is set.
If a mailbox is configured to receive
CAN_MBTD.TDA flag is set. The mailbox is not processed. If there is an incoming message for a temporarily disa-
bled mailbox, the internal logic waits until reception is complete or there is an error on the CAN bus before setting
CAN_MBTD.TDA. Once this flag is set, the mailbox can then be disabled
an incoming frame. The CAN_MBTD.TDR bit must then be reset as soon as possible.
When the CAN_MBTD.TDA flag is set for a given mailbox, only the data field of that mailbox can be updated.
Accesses to the control bits and the identifier are denied.
25–14
register has no effect when configured for automatic remote frame han-
CAN_OPSS1
(CAN_MD1
= 0) and the CAN_MBTD.TDA bit is set, the content of the data
(CAN_MD1
= 1), then after issuing a temporary disable request, the
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
(CAN_MC1
= 0) without the risk of losing

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