System Control Register 1 (Syscr1) - Renesas RX100 Series User Manual

RX13T Group
3.2.2

System Control Register 1 (SYSCR1)

Address(es): 0008 0008h
b15 b14
— —
Value after reset: 0 0
Bit Symbol
b0 RAME
b15 to b1 —
Note: Set the PRCR.PRC1 bit to 1 (write enabled) before rewriting this register.
RAME Bit (RAM Enable)
The RAME bit enables or disables the RAM.
A 0 should not be written to this bit during access to the RAM. When accessing the RAM immediately after changing the
RAME bit from 0 (RAM disabled) to 1 (RAM enabled), make sure that the RAME bit is 1 before the access.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b13 b12 b11 b10
— — — —
0 0 0 0
Bit Name Description
RAM Enable 0: The RAM is disabled.
1: The RAM is enabled.
Reserved These bits are read as 0. The write value should be 0.
b9 b8 b7 b6
— — — —
0 0 0 0
3. Operating Modes
b5 b4 b3 b2
— — — —
0 0 0 0
Page 76 of 1041
b1 b0
— RAME
0 1
R/W
R/W
R/W