Renesas RX100 Series User Manual page 855

RX13T Group
Are the ADCSR.ADCS[1:0] bits set to 01b
(group scan mode)?
To disable trigger input, set the ADSTRGR register to 3F3Fh
(set the TRSA[5:0] bits and the TRSB[5:0] bits to 3Fh and
3Fh, respectively)
Is the group C used
(ADGCTRGR.GRCE = 1)?
Set the ADGCTRGR.TRSC[5:0] bits to 3Fh
Is the ADCSR.ADST bit set to 0
(A/D conversion stop state)?
Set the ADGSPCR.PGS bit to 1
Figure 26.15 Flow of Setting the ADGSPCR.PGS Bit
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Start
Yes
Yes
Yes
End
No
To disable trigger input, set the ADSTRGR.TRSA[5:0]
Are the ADCSR.ADCS[1:0] bits set to 10b
(continuous scan mode)?
No
YES
Set the ADCSR.ADST bit to 0
(A/D conversion stop state)
To disable trigger input, set the ADSTRGR.TRSB[5:0]
Set the ADCSR.ADCS[1:0] bits to 01b
(group scan mode)
No
26. 12-Bit A/D Converter (S12ADF)
bits to 3Fh
Yes
bits to 3Fh
Page 855 of 1041
No