Pbn Pin Function Control Register (Pbnpfs) (N = 0 To 7) - Renesas RX100 Series User Manual

RX13T Group
18.2.8

PBn Pin Function Control Register (PBnPFS) (n = 0 to 7)

Address(es): PB0PFS 0008 C198h, PB1PFS 0008 C199h, PB2PFS 0008 C19Ah, PB3PFS 0008 C19Bh,
PB4PFS 0008 C19Ch, PB5PFS 0008 C19Dh, PB6PFS 0008 C19Eh, PB7PFS 0008 C19Fh
b7 b6
— ISEL
0 0
Value after reset:
Bit Symbol Bit Name
b4 to b0 PSEL[4:0] Pin Function Select
b5 — Reserved
b6 ISEL Interrupt Input Function Select
b7 — Reserved
Table 18.7 Register Settings for Input/Output Pin Function in 48-/32-pin
Register/Pin
PB0PFS
PSEL[4:0] Settings PB0
00000b (Initial value) Hi-Z
00001b MTIOC0D
00010b MTCLKB
00011b MTIOC2A
00111b —
01001b —
01010b —
01011b —
01100b TXD12
SMOSI12
SSDA12
TXDX12
SIOX12
01111b —
—: Do not specify this value.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b5 b4 b3 b2
— PSEL[4:0]
0 0 0 0
Description
These bits select the peripheral function. For individual pin functions,
see Table 18.7.
This bit is read as 0. The write value should be 0.
0: Not used as IRQn input pin
1: Used as IRQn input pin
PB1: IRQ2 (48-/32-pin)
PB4: IRQ3 (48-pin)
PB7: IRQ5 (48-/32-pin)
This bit is read as 0. The write value should be 0.
PB1PFS PB2PFS
PB1 PB2
MTIOC0C MTIOC0B
MTCLKA MTCLKC
MTIC5W —
— —
— ADSM0
RXD5 TXD5
SMISO5 SMOSI5
SSCL5 SSDA5
— —
— —
SCL0 SDA0
18. Multi-Function Pin Controller (MPC)
b1 b0
0 0
PB3PFS PB4PFS
PB3 PB4
MTIOC0A —
— —
— —
CACREF POE8#
— —
SCK5 —
— —
SCK12 —
— —
PB5PFS PB6PFS PB7PFS
PB5 PB6 PB7
— MTIOC1B MTIOC3C
— — MTCLKD
— MTIOC3A —
— — —
ADTRG0# — —
— TXD5 RXD5
SMOSI5 SMISO5
SSDA5 SSCL5
— TXD1 RXD1
SMOSI1 SMISO1
SSDA1 SSCL1
— — —
— — —
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