Renesas RX100 Series User Manual page 475

RX13T Group
(2) Output Compare Output Timing
A compare match signal is generated in the final state in which TCNT and TGR match (the point at which the count
value matched by TCNT is updated). When a compare match signal is generated, the value set in TIOR is output from
MTIOCnm pin (n = 0 to 4; m = A to D). After a match between TCNT and TGR, the compare match signal is not
generated until the TCNT count clock is generated.
Figure 19.104 shows the output compare output timing (normal mode or PWM mode) and Figure 19.105 shows the
output compare output timing (complementary PWM mode or reset-synchronized PWM mode).
PCLKB
TCNT count clock
TCNT
TGR
Compare match signal
MTIOCnm pin
Figure 19.104 Output Compare Output Timing (Normal Mode or PWM Mode) (n = 0 to 4; m = A to D)
PCLKB
TCNT count clock
TCNT
TGR
Compare match signal
MTIOCnm pin
Figure 19.105 Output Compare Output Timing (Complementary PWM Mode or Reset-Synchronized PWM Mode)
(n = 0 to 4; m = A to D)
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
19. Multi-Function Timer Pulse Unit 3 (MTU3c)
N
N
N
N
N + 1
N + 1
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