A/D Conversion Start Request Select Register 0 (Tadstrgr0) - Renesas RX100 Series User Manual

RX13T Group
19.2.42

A/D Conversion Start Request Select Register 0 (TADSTRGR0)

Address(es): MTU.TADSTRGR0 0009 5D30h
b7 b6
— —
Value after reset: 0 0
Bit Symbol
b4 to b0 TADSTRS0[4:0]
b7 to b5 —
The TADSTRGR0 register selects the A/D conversion start request for generating the A/D conversion start request frame
synchronization signal to be output from the ADSM0 pin.
Table 19.45 Settings of A/D Conversion Start Request for Generating Frame Synchronization Signal
TADSTRS0[4:0]
[4] [3] [2] [1]
0 0 0 0
0 0 0 0
0 0 0 1
0 0 0 1
0 0 1 0
0 0 1 0
0 1 0 0
0 1 0 0
0 1 0 1
0 1 1 0
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b5 b4 b3 b2
— TADSTRS0[4:0]
0 0 0 0
Bit Name
A/D Conversion Start Request
Select for ADSM0 Pin Output
Frame Synchronization Signal
Generation
Reserved
[0] Source Descriptions
0 — Source not selected
1 TRGA0N Compare match/input capture in MTU0.TGRA
0 TRGA1N Compare match/input capture in MTU1.TGRA
1 TRGA2N Compare match/input capture in MTU2.TGRA
0 TRGA3N Compare match/input capture in MTU3.TGRA
1 TRGA4N Compare match/input capture in MTU4.TGRA or MTU4.TCNT underflow
(trough) in complementary PWM mode
0 TRG0N Compare match in MTU0.TGRE
1 TRG4AN Compare match between MTU4.TADCORA and MTU4.TCNT
0 TRG4BN Compare match between MTU4.TADCORB and MTU4.TCNT
0 TRG4ABN Compare match between MTU4.TADCORA and MTU4.TCNT or compare
match between MTU4.TADCORB and MTU4.TCNT (Interrupt skipping
function 2 used)
19. Multi-Function Timer Pulse Unit 3 (MTU3c)
b1 b0
0 0
Description
These bits select the A/D conversion start request for
generating the frame synchronization signal to be output from
the ADSM0 pin. Refer to Table 19.45 for the relationship
between the A/D conversion start request and settings.
Settings other than those listed in Table 19.45 are prohibited.
These bits are read as 0. The write value should be 0.
R/W
R/W
R/W
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