Renesas RX100 Series User Manual page 459

RX13T Group
(2) Basic Example of A/D Converter Start Request Delaying Function Operation
Figure 19.84 shows a basic example of A/D converter start request signal (TRG4AN) operation when the trough of
MTU4.TCNT is specified for the buffer transfer timing and an A/D converter start request signal is output during
MTU4.TCNT down-counting.
Transfer from cycle buffer
register to cycle register
A/D converter start
request (TRG4AN)
Period in which A/D converter start requests are enabled (UT4AE = 1): 0  MTU4.TCNT  TCDR – 1
Period in which A/D converter start requests are enabled (DT4AE = 1): TCDR  MTU4.TCNT  1
UT4AE, DT4AE, BF[1:0]: Bits in TADCR
Figure 19.84 Basic Example of A/D Converter Start Request Signal (TRG4AN) Operation
(3) Period in Which A/D Converter Start Requests are Enabled
When the MTU4.TCNT counter and the MTU4.TADCORA or MTU4.TADCORB register matches within the period
enabled by the UT4AE and UT4BE bits, the corresponding A/D converter start request (TRG4AN or TRG4BN) is
issued.
When the UT4AE and UT4BE bits in the MTU4.TADCR register are set to 1 in complementary PWM mode, A/D
converter start requests are enabled during the MTU4.TCNT up-counting (0
DT4AE and DT4BE bits in the MTU4.TADCR register are set to 1, A/D converter start requests are enabled during
MTU4.TCNT down-counting (TCDR
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Transfer from cycle buffer
register to cycle register
MTU4.TCNT
MTU4.TADCORA
MTU4.TADCOBRA
 
MTU4.TCNT 1). Refer to Figure 19.84 .
19. Multi-Function Timer Pulse Unit 3 (MTU3c)
Period in which A/D Period in which A/D
converter start converter start
requests are enabled requests are enabled
(DT4AE = 1) (UT4AE = 1)
Complementary
PWM mode
UT4AE = 0
DT4AE = 1
BF[1:0] = 10b
 
MTU4.TCNT TCDR – 1). When the
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