D/A Control Register (Dacr); Data Register Format Select Register (Dadpr) - Renesas RX100 Series User Manual

32-bit mcu
Hide thumbs Also See for RX100 Series:
Table of Contents

Advertisement

RX13T Group
27.2.2

D/A Control Register (DACR)

Address(es): DA.DACR 0008 80C4h
b7
b6
DAOE0
0
0
Value after reset:
Bit
Symbol
Bit Name
b4 to b0
Reserved
b5
Reserved
b6
DAOE0
D/A Output Enable 0
b7
Reserved
DAOE0 Bit (D/A Output Enable 0)
The DAOE0 bit controls the D/A conversion.
27.2.3

Data Register Format Select Register (DADPR)

Address(es): DA.DADPR 0008 80C5h
b7
b6
DPSEL
Value after reset:
0
0
Bit
Symbol
Bit Name
b6 to b0
Reserved
b7
DPSEL
Format Select
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
27. D/A Converter for Generating Comparator C Reference Voltage (DA)
b5
b4
b3
b2
0
1
1
1
Description
These bits are read as 1. The write value should be 1.
This bit is read as 0. The write value should be 0.
0: D/A conversion is disabled.
1: D/A conversion is enabled.
This bit is read as 0. The write value should be 0.
b5
b4
b3
b2
0
0
0
0
Description
These bits are read as 0. The write value should be 0.
0: Data is right-justified.
1: Data is left-justified.
b1
b0
1
1
b1
b0
0
0
R/W
R/W
R
R/W
R
R/W
R/W
R/W
Page 885 of 1041

Advertisement

Table of Contents
loading

Table of Contents