Renesas RX100 Series User Manual page 648

32-bit mcu
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RX13T Group
Start bit
0
RXI interrupt flag
1
(IRn in ICU*
)
SSR.FER flag
RTSn# pin
Note 1. Refer to section 14, Interrupt Controller (ICUb) for details on the corresponding interrupt vector number.
Figure 23.14
Example of SCI Operation for Serial Reception in Asynchronous Mode (2)
(When RTS Function is Used) (Example with 8-Bit Data, Parity, 1 Stop Bit)
Table 23.28 lists the states of the flags in the SSR status register and receive data handling when a receive error is
detected.
If a receive error is detected, an ERI interrupt request is generated but an RXI interrupt request is not generated. Data
reception cannot be resumed while the receive error flag is 1. Accordingly, set the ORER, FER, and PER flags to 0
before resuming reception. Moreover, be sure to read the RDR (or the RDRL) during overrun error processing. When a
reception is forcibly terminated by setting the SCR.RE bit to 0 during operation, read the RDR (or the RDRL) register
because received data which has not yet been read may be left in RDR (or the RDRL).
Figure 23.15 and Figure 23.16 show samples of flowcharts for serial data reception.
Table 23.28
Flags in the SSR Status Register and Receive Data Handling
Flags in the SSR Status Register
ORER
FER
1
0
0
1
0
0
1
1
1
0
0
1
1
1
Note 1. Read data not in RDR but in the RDRH and RDRL registers when 9-bit data length is selected.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Data
Parity
Stop
bit
bit
D0
D7
0/1
1
RDR data read in RXI interrupt
RXI interrupt
handling routine
request
generated
1 frame
PER
Receive Data
0
Lost
0
Transferred to RDR*
1
Transferred to RDR*
0
Lost
1
Lost
1
Transferred to RDR*
1
Lost
23. Serial Communications Interface (SCIg, SCIh)
Data
Parity
Stop
Start bit
bit
bit
0
D0
D7
0/1
ERI interrupt request
generated by framing error
Receive Error Type
Overrun error
1
Framing error
1
Parity error
Overrun error + framing error
Overrun error + parity error
1
Framing error + parity error
Overrun error + framing error + parity error
Start bit
Idle state
0
0
(mark state)
Error flag is cleared
Page 648 of 1041
Data
D0

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