Renesas RX100 Series User Manual page 613

32-bit mcu
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RX13T Group
Table 23.22
BRR Settings for Various Bit Rates (Simple I
8
Bit Rate
(bps)
n
N
Error (%) n
10 k
0
24
0.0
25 k
0
9
0.0
50 k
0
4
0.0
100 k
0
2
–16.7
250 k
0
0
0.0
350 k
Operating Frequency
PCLK (MHz)
30
Bit Rate
(bps)
n
N
Error (%)
10 k
1
23
–2.3
25 k
1
9
–6.3
50 k
1
4
–6.3
100 k
1
2
–21.9
250 k
0
3
–6.3
350 k
0
2
–10.7
Table 23.23
Minimum Widths at High and Low Level for SCL at Various Bit Rates (Simple I
8
Min. Widths at
Bit Rate
High/Low Level
(bps)
n
N
for SCL (μs)
10 k
0
24
43.75/50.00
25 k
0
9
17.50/20.00
50 k
0
4
8.75/10.00
100 k
0
2
5.25/6.00
250 k
0
0
1.75/2.00
350 k
Operating Frequency PCLK (MHz)
25
Min. Widths at
Bit Rate
High/Low Level
(bps)
n
N
for SCL (μs)
10 k
1
19
44.80/51.20
25 k
1
7
17.92/20.48
50 k
1
3
8.96/10.24
100 k
1
1
4.48/5.12
250 k
0
3
2.24/2.56
350 k
0
2
1.68/1.92
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Operating Frequency PCLK (MHz)
10
N
Error (%)
n
0
31
–2.3
1
0
12
–3.8
1
0
6
–10.7
1
0
3
–21.9
0
0
1
–37.5
0
Operating Frequency PCLK (MHz)
10
Min. Widths at
High/Low Level
n
N
for SCL (μs)
0
31
44.80/51.20
0
12
18.20/20.80
0
6
9.80/11.20
0
3
5.60/6.40
0
1
2.80/3.20
30
Min. Widths at
High/Low Level
n
N
for SCL (μs)
1
23
44.80/51.20
1
9
18.66/21.33
1
4
9.33/10.66
1
2
5.60/6.40
0
3
1.86/2.13
0
2
1.40/1.60
23. Serial Communications Interface (SCIg, SCIh)
2
C Mode)
16
20
N
Error (%) n
N
12
–3.8
1
15
4
0.0
1
6
2
–16.7
1
3
4
0.0
0
6
1
0.0
0
2
0
1
16
Min. Widths at
High/Low Level
n
N
for SCL (μs)
1
12
45.50/52.00
1
4
17.50/20.00
1
2
10.50/12.00
0
4
4.37/5.00
0
1
1.75/2.00
25
Error (%) n
N
Error (%)
–2.3
1
19
–2.3
–10.7
1
7
–2.3
–21.9
1
3
–2.3
–10.7
1
1
–2.3
–16.7
0
3
–21.9
–10.7
0
2
–25.6
2
C Mode)
20
Min. Widths at
High/Low Level
n
N
for SCL (μs)
1
15
44.80/51.20
1
6
19.60/22.40
1
3
11.20/12.80
0
6
4.90/5.60
0
2
2.10/2.40
0
1
1.40/1.60
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