Renesas RX100 Series User Manual page 644

RX13T Group
SCR.TE bit
TXI interrupt flag
*1
(IRn in ICU )
SSR.TEND flag
TXI interrupt request
generated
Note 1. Refer to section 14, Interrupt Controller (ICUb) for details on the corresponding interrupt vector number.
Figure 23.9 Example of Operation for Serial Transmission in Asynchronous Mode (1)
(with 8-Bit Data, Parity, 1 Stop Bit, CTS Function Not Used, at the Beginning of Transmission)
CTSn# pin
SCR.TE bit
TXI interrupt flag
*1
(IRn in ICU )
SSR.TEND flag
TXI interrupt request
generated
Note 1. Refer to section 14, Interrupt Controller (ICUb) for details on the corresponding interrupt vector number.
Figure 23.10 Example of Operation for Serial Transmission in Asynchronous Mode (2)
(with 8-Bit Data, Parity, 1 Stop Bit, CTS Function Used, at the Beginning of Transmission)
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Start bit
Data written to TDR in TXI interrupt
TXI interrupt handling request generated
routine
Start bit
0 D0 D1
Data written to TDR
in TXI interrupt
handling routine
TXI interrupt request
generated
23. Serial Communications Interface (SCIg, SCIh)
Data
Parity bit Stop bit
0 D0 D1 D7 0/1 1
1 frame
Data written to TDR in
TXI interrupt handling
routine
Data
Parity bit Stop bit
D7 0/1 1
0 D0
1 frame
Data written to TDR in TXI
interrupt handling routine
0 D0 D1 D7 0/1
Data written to TDR in
TXI interrupt handling
routine
D7 0/1 1 Idle state
D1
(mark state)
Data written to TDR in TXI
interrupt handling routine
Page 644 of 1041
1 0
0