Serial Data Reception (Asynchronous Mode) - Renesas RX100 Series User Manual

RX13T Group
23.3.8

Serial Data Reception (Asynchronous Mode)

Figure 23.13 and Figure 23.14 show an example of the operation for serial data reception in asynchronous mode.
In serial data reception, the SCI operates as described below.
1. When the value of the SCR.RE bit becomes 1, the output signal on the RTSn# pin goes to the low level.
2. When the SCI monitors the communications line and detects a start bit, it performs internal synchronization, stores
receive data in the RSR register, and checks the parity bit and stop bit.
3. If an overrun error occurs, the SSR.ORER flag is set to 1. If the SCR.RIE bit is 1 at this time, an ERI interrupt
request is generated. Receive data is not transferred to the RDR register *
4. If a parity error is detected, the SSR.PER flag is set to 1 and receive data is transferred to the RDR register *
SCR.RIE bit is 1 at this time, an ERI interrupt request is generated.
5. If a framing error (when the stop bit is 0) is detected, the SSR.FER flag is set to 1 and receive data is transferred to
1
the RDR register * . If the SCR.RIE bit is 1 at this time, an ERI interrupt request is generated.
6. When reception finishes successfully, receive data is transferred to the RDR register *
this time, an RXI interrupt request is generated. Continuous reception is enabled by reading the receive data
transferred to the RDR register *
completed. Reading the received data that have been transferred to the RDR register *
output the low level.
Note 1. Read data not in the RDR register but in the RDRH and RDRL registers when 9-bit data length is selected.
Note 2. The SCI checks for reading of the RDRL register only and does not check for reading of the RDRH register when
9-bit data length is selected.
Start bit
0
RXI interrupt flag
1
(IRn in ICU* )
SSR.FER flag
Note 1. Refer to section 14, Interrupt Controller (ICUb) for details on the corresponding interrupt vector number.
Figure 23.13 Example of SCI Operation for Serial Reception in Asynchronous Mode (1) (When RTS Function is
Not Used) (Example with 8-Bit Data, Parity, 1 Stop Bit)
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
1
in this RXI interrupt handling routine before reception of the next receive data is
Data
Parity
bit
D0 D1 D7 0/1
RXI interrupt
request
generated
1 frame
23. Serial Communications Interface (SCIg, SCIh)
1
.
Stop
Start bit
bit
1 0 D0 D1
RDR data read in RXI interrupt
handling routine
1
. If the SCR.RIE bit is 1 at
1
causes the RTSn# pin to
Data
Parity Stop
bit bit
Idle state
D7 0/1 0
(mark state)
ERI interrupt request generated
by framing error
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1
. If the