Enabling And Disabling Interrupt Sources - Renesas RX100 Series User Manual

RX13T Group
14.4.2

Enabling and Disabling Interrupt Sources

Enabling requests from a given interrupt source requires the following settings.
1. In the case of interrupt requests from peripheral modules, setting the interrupt enable bit for the peripheral module
to permit the output of interrupt requests from the source
2. Enabling of the interrupt by the IERm.IENj bit (m = 02h to 1Fh, j = 0 to 7)
When an interrupt request that is enabled at the corresponding source is generated, the corresponding IRn.IR flag (n =
interrupt vector number) is set to 1.
Setting the IERm.IENj bit to enable an interrupt request allows the interrupt request for which the corresponding IRn.IR
is 1 to be output to the interrupt request destination. Setting the IERm.IENj bit to disable an interrupt request suspends
the output of the interrupt request for which the corresponding IRn.IR is 1.
The IRn.IR flag is not affected by the IERm.IENj bit.
Use the following procedure to disable interrupt requests.
1. Set the IERm.IENj bit to disable interrupt requests.
2. Set the peripheral module interrupt output enable bit to disable the output. Read the last written register and confirm
that writing is completed.
3. Check the IRn.IR flag, and clear the IRn.IR flag if necessary. *
Note 1. To disable the transmission or reception interrupt of the SCI or RIIC from the enabled state, clear the IRn.IR flag
to 0 using the above procedure. For details, see descriptions of the interrupts in section 23, Serial
Communications Interface (SCIg, SCIh) and section 24, I
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
14. Interrupt Controller (ICUb)
1
2
C-bus Interface (RIICa).
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