Renesas RX100 Series User Manual page 460

32-bit mcu
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RX13T Group
(4) Buffer Transfer
The data in the timer A/D converter start request cycle set registers (MTU4.TADCORA and MTU4.TADCORB) is
updated by writing data to the timer A/D converter start request cycle set buffer registers (MTU4.TADCOBRA and
MTU4.TADCOBRB). Data is transferred from the buffer registers to the respective cycle set registers at the timing
selected with the BF[1:0] bits in the MTU4.TADCR register.
In complementary PWM mode, data is also transferred from the timer A/D converter start request cycle set buffer
registers to the timer A/D converter start request cycle set registers when MTU4.TGRD register is updated.
There are notes on the timing for transferring data when using buffer transfer in complementary PWM mode.
For details, section 19.6.27, Usage Notes on A/D Converter Delaying Function in Complementary PWM Mode .
In modes other than complementary PWM mode, set the BF1 bit in the MTU4.TADCR register to 0.
MTU4.TGRD
MTU4.TADCOBRA
MTU4.TADCORA
A/D converter start request
(TRG4AN)
Figure 19.85
Example of A/D Converter Start Request Signal (TRG4AN) and Buffer Transfer Operation
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Transfer from cycle buffer
Transfer from cycle buffer
register to cycle register
MTU4.TCNT
MTU4.TADCOBRA
DataA
Data0
Data0
19. Multi-Function Timer Pulse Unit 3 (MTU3c)
Transfer from cycle buffer
register to cycle register
register to cycle register
MTU4.TADCORA
Data1
Data1
MTU4.TGRD modified
DataB
Data2
Data2
(Complementary PWM mode)
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