Renesas RX100 Series User Manual page 786

RX13T Group
[When slave addresses conflict]
S 1 2
SCL0
SDA0
S 1 2
SCL0
SDA0
BBSY
MST
TRS
AL
AASy
TDRE
[When data transmission conflicts after general call address is sent]
S 1 2
SCL0
SDA0
0 0
S S 1 2
SCL0
SDA0
0 0
BBSY
MST
TRS
AL
GCA
RDRF
Figure 24.33 Examples of Master Arbitration-Lost Detection (MALE = 1)
Bus free (BBSY = 0) start condition issuance (ST = 1) error
PCLK
SCL0
SDA0
S
SCL0
SDA0
BBSY
MST
TRS
AASy
ST
AL
Write 1 to ST bit
Figure 24.34 Arbitration-Lost When a Start Condition is Issued (MALE = 1)
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Transmit data mismatch
(Arbitration lost)
3 4 5 6
1 1
3 4 5 6 7 8
0 R
Clear AL flag to 0
3 4 5 6 7 8
0 0 0 0 0 W
3 4 5 6 7 8
0 0 0 0 0 W
Bus busy (BBSY =1) start condition issuance (ST = 1) error
SDA mismatch
SCL0 SCL0
SDA0
1
SCL0
SDA0
ST = 1, BBSY = 1
ST = 1, BBSY = 1
BBSY
MST
TRS
AASy
ST
AL
Release SCL/SDA
9 1 2 3 4 5
ACK
Data
Address match
Address mismatch
9 1 2 3 4 5
ACK
1
9 1 2 3 4 5
ACK
0
General call address match (0000 000b + W)
PCLK
SCL0
SDA0
S 1 2
SCL0
SDA0
BBSY
MST
TRS
AASy
ST
AL
Write 1 to ST bit
2
24. I C-bus Interface (RIICa)
6 7 8 9 1 2
ACK
Transmit data mismatch Release SCL/SDA
(Arbitration lost)
6 7 8 9 1 2
ACK
Receive data
Clear AL flag to 0
Read ICDRR register
PCLK
S 1 2 6 7 8
7-bit/10-bit slave address
R
Page 786 of 1041
3 4 5
Data
3 4 5
Data
9 1
ACK
ST = 1,
BBSY = 1
Write 1 to ST bit