31.10 Communication Protocol; State Transition In Boot Mode (Sci Interface) - Renesas RX100 Series User Manual

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31.10 Communication Protocol

This section describes the protocol used in boot mode. When developing a serial programmer, control with this
communication protocol.
31.10.1

State Transition in Boot Mode (SCI Interface)

Figure 31.26 shows the Boot Mode (SCI Interface) State Transition.
Start up in boot mode
(for SCI interface)
(2)
Inquiry/setting host
command wait state
ID code
protection disabled
(4)
Program/erase host
command wait state
Program
completed
Program wait state
Figure 31.26
Boot Mode (SCI Interface) State Transition
(1) Bit rate automatic adjustment state
In this state, the bit rate is automatically adjusted to 9,600 or 19,200 bps for communication with the host.
When the bit rate adjustment is completed, the MCU sends 00h to the host. After that, when the MCU receives 55h
sent from the host, the MCU sends E6h to the host, and enters the inquiry/setting host command wait state.
The host must not send data until 400 ms elapse after a reset of the MCU is released.
(2) Inquiry/setting host command wait state
In this state, the host can make inquiries for the MCU information including block configuration, size, and
addresses where the user area and data area are allocated, and select the endian of data and a bit rate.
When the MCU receives the program/erase host state transition command from the host, it determines whether boot
mode ID code protection is enabled or disabled. If boot mode ID code protection is disabled, the MCU enters the
inquiry/setting host command wait state. If boot mode ID code protection is enabled, the MCU enters the boot mode
ID code authentication state.
Refer to section 31.10.5, Inquiry Commands and section 31.10.6, Setting Commands for details on
inquiry/setting commands.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Inquiry/setting command
Response
ID code
protection enabled
(3)
Boot mode ID code
authentication state
Read-check command
Response
Program preparation
Program
31. Flash Memory (FLASH)
(1)
Bit rate automatic
adjustment state
Inquiry/setting host
command execution state
Program/erase
Read-check host command
execution state
Block erase
Erase wait state
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