Iwdt Status Register (Iwdtsr) - Renesas RX100 Series User Manual

RX13T Group
22.2.3

IWDT Status Register (IWDTSR)

Address(es): IWDT.IWDTSR 0008 8034h
b15 b14
REFEF UNDFF
Value after reset: 0 0
Bit Symbol
b13 to b0 CNTVAL[13:0]
b14 UNDFF
b15 REFEF
Note 1. Only 0 can be written to clear the flag.
The IWDTSR register is initialized by the reset source of the IWDT. The IWDTSR register is not initialized by other
reset sources.
CNTVAL[13:0] Bits (Counter Value)
These bits are used to confirm the counter value of the counter, but note that the read value may differ from the actual
count by a value of one count.
UNDFF Flag (Underflow Flag)
This bit is used to confirm whether or not an underflow has occurred in the counter.
The value 1 indicates that the counter has underflowed. The value 0 indicates that the counter has not underflowed.
Write 0 to the UNDFF flag to set the value to 0. Writing 1 has no effect.
REFEF Flag (Refresh Error Flag)
This bit is used to confirm whether or not a refresh error (performing a refresh operation during a refresh-prohibited
period).
The value 1 indicates that a refresh error has occurred. The value 0 indicates that no refresh error has occurred.
Write 0 to the REFEF flag to set the value to 0. Writing 1 has no effect.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b13 b12 b11 b10
0 0 0 0
Bit Name
Counter Value
Underflow Flag
Refresh Error Flag
22. Independent Watchdog Timer (IWDTa)
b9 b8 b7 b6
CNTVAL[13:0]
0 0 0 0
Description
Value counted by the counter
0: No underflow occurred
1: Underflow occurred
0: No refresh error occurred
1: Refresh error occurred
b5 b4 b3 b2
0 0 0 0
Page 569 of 1041
b1 b0
0 0
R/W
R
R/(W)
1
*
R/(W)
1
*