Cascade Connection 32-Bit Phase Counting Mode - Renesas RX100 Series User Manual

32-bit mcu
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19.3.6.2

Cascade Connection 32-Bit Phase Counting Mode

When MTU1 is set to phase counting mode by setting MTU1.TMDR3.LWA = 1, MTU1 and MTU2 are connected to
operate in cascade connection 32-bit phase counting mode. When this mode is used, the TCR, TCR2, TIOR, TIER, TGR,
and TSR registers are controlled by MTU1 and the settings of MTU2 are disabled. Refer to Figure 19.41 for the
procedure for setting cascade connection 32-bit phase counting mode.
Refer to section 19.3.4, Cascaded Operation , for details on the cascade connection function for connecting MTU1
and MTU2 in a mode other than cascade connection 32-bit phase counting mode.
(1) Example of Setting Cascade Connection 32-Bit Phase Counting Mode
Figure 19.41 shows an example of the procedure for setting cascade connection 32-bit phase counting mode.
32-bit Phase Counting Mode
Combine MTU1 and MTU2 for
access as a 32-bit unit.
Select the phase counting mode and
external clock input pin.
Counting starts in MTU1 and MTU2.
32-bit phase counting mode starts.
Figure 19.41
Procedure for Setting Cascade Connection 32-Bit Phase Counting Mode
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
19. Multi-Function Timer Pulse Unit 3 (MTU3c)
[1] Set the LWA bit in MTU1.TMDR3 to 1 and combine
[1]
MTU1 and MTU2 for access as a 32-bit unit.*
[2] Select phase counting mode with the MD[3:0] bits in
[2]
MTU1.TMDR1 and select the external clock input pin
with the PHCKSEL bits in MTU1.TMDR3.
[3] Start counting in MTU1 and MTU2 by setting the
[3]
TSTRA.CST1 and CST2 bits to 1 simultaneously.
Note 1. When the LWA bit in MTU1.TMDR3 is set to 1, the
TCR, TCR2, TMDR, and TIOR registers in MTU1
are effective in controlling cascaded operation. In
this case, the settings of these registers in MTU2
are ignored.
1
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