Renesas RX100 Series User Manual page 10

9.2.16 High-Speed On-Chip Oscillator Trimming Register n (HOCOTRRn) (n = 0) ........................ 147
9.3 Main Clock Oscillator ....................................................................................................................... 148
9.3.1 Connecting a Crystal ................................................................................................................ 148
9.3.2 External Clock Input ................................................................................................................. 149
9.3.3 Notes on the External Clock Input ........................................................................................... 149
9.4 Oscillation Stop Detection Function .................................................................................................. 150
9.4.1 Oscillation Stop Detection and Operation after Detection ....................................................... 150
9.4.2 Oscillation Stop Detection Interrupts ....................................................................................... 151
9.5 PLL Circuit ........................................................................................................................................ 152
9.6 Internal Clock .................................................................................................................................... 152
9.6.1 System Clock ............................................................................................................................ 152
9.6.2 Peripheral Module Clock .......................................................................................................... 152
9.6.3 FlashIF Clock ........................................................................................................................... 152
9.6.4 CAC Clock ............................................................................................................................... 152
9.6.5 IWDT-Dedicated Clock ............................................................................................................ 152
9.7 Usage Notes ....................................................................................................................................... 154
9.7.1 Notes on Clock Generation Circuit .......................................................................................... 154
9.7.2 Notes on Resonator ................................................................................................................... 154
9.7.3 Notes on Board Design ............................................................................................................. 154
9.7.4 Notes on Resonator Connection Pins ....................................................................................... 155
10. Clock Frequency Accuracy Measurement Circuit (CAC) ............................................................. 156
10.1 Overview ........................................................................................................................................... 156
10.2 Register Descriptions ......................................................................................................................... 158
10.2.1 CAC Control Register 0 (CACR0) ........................................................................................... 158
10.2.2 CAC Control Register 1 (CACR1) ........................................................................................... 159
10.2.3 CAC Control Register 2 (CACR2) ........................................................................................... 160
10.2.4 CAC Interrupt Request Enable Register (CAICR) ................................................................... 161
10.2.5 CAC Status Register (CASTR) ................................................................................................ 162
10.2.6 CAC Upper-Limit Value Setting Register (CAULVR) ........................................................... 163
10.2.7 CAC Lower-Limit Value Setting Register (CALLVR) ........................................................... 163
10.2.8 CAC Counter Buffer Register (CACNTBR) ............................................................................ 163
10.3 Operation ........................................................................................................................................... 164
10.3.1 Measuring Clock Frequency ..................................................................................................... 164
10.3.2 Digital Filtering of Signals on the CACREF Pin ..................................................................... 165
10.4 Interrupt Requests .............................................................................................................................. 165
10.5 Usage Notes ....................................................................................................................................... 166
10.5.1 Module Stop Function Setting .................................................................................................. 166
11. Low Power Consumption ............................................................................................................. 167
11.1 Overview ........................................................................................................................................... 167
11.2 Register Descriptions ......................................................................................................................... 171
11.2.1 Standby Control Register (SBYCR) ......................................................................................... 171