Renesas RX100 Series User Manual page 450

RX13T Group
(q) A/D Converter Start Request Setting
In complementary PWM mode, an A/D converter start request can be issued using MTU3.TGRA compare match,
MTU4.TCNT underflow (trough), or compare match on a channel other than MTU3 and MTU4.
When start requests using MTU3.TGRA compare match are specified, A/D conversion can be started at the crest of the
MTU3.TCNT count.
A/D converter start requests can be specified by setting the TIER.TTGE bit. To issue an A/D converter start request at an
MTU4.TCNT underflow (trough), set the MTU4.TIER.TTGE2bit to 1.
(r) Double Buffer Function in Complementary PWM Mode
In complementary PWM mode 3 (transfer at the crest and trough), the PWM output setting resolution can be improved
from ±2 to ±1 by setting the TMDR2A.DRS bit to 1.
When setting buffer registers A (MTU3.TGRD, MTU4.TGRC, and MTU4.TGRD), set also buffer registers B
(MTU3.TGRE, MTU4.TGRE, and MTU4.TGRF) at the same time. For details of the setting procedure, refer to section
19.3.8 (1), Example of Complementary PWM Mode Setting Procedure
Note: When a buffer register B is set to the buffer register A value, symmetric PWM waveforms are output. When a
buffer register B is not set to the buffer register A value, asymmetric PWM waveforms are output.
Figure 19.74 shows an example of double buffer operation.
Each register data is transferred as follows.
 After MTU4.TGRD (buffer A) is written to, data is transferred from MTU4.TGRD (buffer A) to Temp3A
(temporary A) and from MTU4.TGRF (buffer B) to Temp3B (temporary B).
 With timing (1) in the figure, data is transferred from Temp3A (temporary A) to MTU4.TGRB (compare).
 With timing (2) in the figure, data is transferred from Temp3B (temporary B) to MTU4.TGRB (compare).
In the crest interval (Tb1 interval), the compare register and temporary register A are valid; in the trough interval (Tb2
interval), the compare register and temporary register B are valid.
MTU3.TGRA
TCDRA
MTU4.TGRB
TDDRA
MTU4.TGRD
(buffer A)
MTU4.TGRF
(buffer B)
Temp3A
(temporary A)
Temp3B
(temporary B)
MTU4.TGRB
(compare)
MTIOC4B (output)
MTIOC4D (output)
Figure 19.74 Example of Double Buffer Operation
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Tb1 interval Tb2 interval
(1)
TCNTSA
MTU3.
TCNT
MTU4.
TCNT
(2)
Buffer A modified
1111h 1211h
Buffer B modified
1210h
1110h
1111h 1211h
1110h 1210h
1110h 1111h
19. Multi-Function Timer Pulse Unit 3 (MTU3c)
Tb1 interval Tb2 interval
(1)
(2)
1210h 1211h
Tb1 interval
(1)
(2)
1210h 1211h
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