A/D Conversion Start Trigger Select Register (Adstrgr) - Renesas RX100 Series User Manual

RX13T Group
26.2.10

A/D Conversion Start Trigger Select Register (ADSTRGR)

Address(es): S12AD.ADSTRGR 0008 9010h
b15 b14
— —
Value after reset: 0 0
Bit Symbol
b5 to b0 TRSB[5:0]
b7, b6 —
b13 to b8 TRSA[5:0]
b15, b14 —
ADSTRGR selects the A/D conversion start trigger.
TRSB[5:0] Bits (A/D Conversion Start Trigger Select for Group B)
The TRSB[5:0] bits select the trigger to start scanning of the analog input selected in group B. The TRSB[5:0] bits
require to be set only in group scan mode and are not used in any other scan mode. For the scan conversion start trigger
for group B, setting a software trigger or an asynchronous trigger is prohibited. Therefore, the TRSB[5:0] bits should be
set to the value other than 000000b and the ADCSR.TRGE bit should be set to 1 in group scan mode.
When two groups are selected (ADGCTRGR.GRCE = 0) during group priority operation in group scan mode, setting the
ADGSPCR.GBRP bit to 1 allows group B to continuously operate in single scan mode. When setting the
ADGSPCR.GBRP bit to 1, set the TRSB[5:0] bits to 3Fh. Note that the issuance period of trigger for A/D conversion
must be more than or equal to the actual scan conversion time (t
conversion by the trigger may have no effect.
When the trigger from the module (MTU) operated in PCLKB is selected as an A/D conversion start trigger, a delay of
the period for synchronization processing occurs. See section 26.3.5, Analog Input Sampling Time and Scan
Conversion Time for details.
Table 26.6 lists the A/D conversion startup sources selected by the TRSB[5:0] bits.
TRSA[5:0] Bits (A/D Conversion Start Trigger Select)
The TRSA[5:0] bits select the trigger to start A/D conversion in single scan mode and continuous scan mode. In group
scan mode, the trigger to start scanning of the analog input selected in group A is selected. When scanning is executed in
group scan mode or double trigger mode, set the ADCSR.TRGE bit to 1.
 When using the A/D conversion startup source of a synchronous trigger, set the ADCSR.TRGE bit to 1 and set the
ADCSR.EXTRG bit to 0.
 When using the asynchronous trigger, set the ADCSR.TRGE bit to 1 and set the ADCSR.EXTRG bit to 1.
 Software trigger (ADCSR.ADST) is enabled regardless of the settings of the ADCSR.TRGE bit, the
ADCSR.EXTRG bit, and the TRSA[5:0] bits.
Note that the issuance period of trigger for A/D conversion must be more than or equal to the actual scan conversion time
(t ). If the issuance period is less than t
SCAN
the module (MTU) operated in PCLKB is selected as an A/D conversion start trigger, a delay of the period for
synchronization processing occurs. See section 26.3.5, Analog Input Sampling Time and Scan Conversion Time
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b13 b12 b11 b10
TRSA[5:0]
0 0 0 0
Bit Name
A/D Conversion Start Trigger Select
for Group B
Reserved
A/D Conversion Start Trigger Select
Reserved
, A/D conversion by a trigger may have no effect. When the trigger from
SCAN
b9 b8 b7 b6
— —
0 0 0 0
Description
Select the A/D conversion start trigger for group B in
group scan mode.
These bits are read as 0. The write value should be 0.
Select the A/D conversion start trigger in single scan
mode and continuous scan mode. In group scan mode,
the A/D conversion start trigger for group A is selected.
These bits are read as 0. The write value should be 0.
). If the issuance period is less than t
SCAN
26. 12-Bit A/D Converter (S12ADF)
b5 b4 b3 b2
TRSB[5:0]
0 0 0 0
SCAN
Page 826 of 1041
b1 b0
0 0
R/W
R/W
R/W
R/W
R/W
, A/D