Processor Status Word (Psw) - Renesas RX100 Series User Manual

32-bit mcu
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2.2.2.4

Processor Status Word (PSW)

b31
b30
Value after reset:
0
0
b15
b14
Value after reset:
0
0
Bit
Symbol
b0
C
b1
Z
b2
S
b3
O
b15 to b4
1
b16
I*
1
b17
U*
b19, b18
1,
2,
3
b20
PM*
*
*
b23 to b21 —
1
b27 to b24 IPL[3:0]*
b31 to b28 —
Note 1. In user mode, writing to the IPL[3:0], PM, U, and I bits by an MVTC or a POPC instruction is ignored.
Writing to the IPL[3:0] bits by an MVTIPL instruction generates a privileged instruction exception.
Note 2. In supervisor mode, writing to the PM bit by an MVTC or a POPC instruction is ignored, but writing to the other bits is possible.
Note 3. Switching from supervisor mode to user mode requires execution of an RTE instruction after having set the
on the stack to 1 or executing an RTFI instruction after having set the
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b29
b28
b27
b26
IPL[3:0]
0
0
0
0
b13
b12
b11
b10
0
0
0
0
Bit Name
Carry Flag
Zero Flag
Sign Flag
Overflow Flag
Reserved
Interrupt Enable
Stack Pointer Select
Reserved
Processor Mode Select
Reserved
Processor Interrupt Priority Level
Reserved
b25
b24
b23
b22
0
0
0
0
b9
b8
b7
b6
0
0
0
0
Description
0: No carry has occurred.
1: A carry has occurred.
0: Result is not 0.
1: Result is 0.
0: Result is a positive value or 0.
1: Result is a negative value.
0: No overflow has occurred.
1: An overflow has occurred.
These bits are read as 0. The write value should be 0.
0: Interrupt disabled.
1: Interrupt enabled.
0: Interrupt stack pointer (ISP) is selected.
1: User stack pointer (USP) is selected.
These bits are read as 0. The write value should be 0.
0: Supervisor mode is selected.
1: User mode is selected.
These bits are read as 0. The write value should be 0.
b27
b24
0 0 0 0: Priority level 0 (lowest)
0 0 0 1: Priority level 1
0 0 1 0: Priority level 2
0 0 1 1: Priority level 3
0 1 0 0: Priority level 4
0 1 0 1: Priority level 5
0 1 1 0: Priority level 6
0 1 1 1: Priority level 7
1 0 0 0: Priority level 8
1 0 0 1: Priority level 9
1 0 1 0: Priority level 10
1 0 1 1: Priority level 11
1 1 0 0: Priority level 12
1 1 0 1: Priority level 13
1 1 1 0: Priority level 14
1 1 1 1: Priority level 15 (highest)
These bits are read as 0. The write value should be 0.
BPSW.PM bit
b21
b20
b19
b18
PM
0
0
0
0
b5
b4
b3
b2
O
S
0
0
0
0
PSW.PM bit
to 1.
Page 48 of 1041
2. CPU
b17
b16
U
I
0
0
b1
b0
Z
C
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
saved

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