Renesas RX100 Series User Manual page 645

32-bit mcu
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RX13T Group
Start bit
0 D0
SCR.TE bit
1
TXI interrupt flag
*1
(IRn in ICU
)
SSR.TEND flag
TXI interrupt request
generated
Note 1. Refer to section 14, Interrupt Controller (ICUb) for details on the corresponding interrupt vector number.
Figure 23.11
Example of Operation for Serial Transmission in Asynchronous Mode (3)
(with 8-Bit Data, Parity, 1 Stop Bit, CTS Function Not Used, from the Middle of Transmission until
Transmission Completion)
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Data
Parity bit
Stop bit
D1
D7 0/1 1
0 D0 D1
(TIE = 1)
Data written to TDR in
TXI interrupt handling
routine
TXI interrupt
request generated
1 frame
23. Serial Communications Interface (SCIg, SCIh)
D7 0/1 1
0 D0
D1
(TIE = 0)
Data written to TDR in TXI interrupt
handling routine
(Set the TIE bit to 0 and the TEIE bit to
1 after writing the last data)
Idle state
D7 0/1
1
(mark state)
TEI interrupt
request generated
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