Nmi Pin Digital Filter Setting Register (Nmifltc) - Renesas RX100 Series User Manual

RX13T Group
14.2.15

NMI Pin Digital Filter Setting Register (NMIFLTC)

Address(es): ICU.NMIFLTC 0008 7594h
b7 b6
— —
Value after reset: 0 0
Bit Symbol
b1, b0 NFCLKSEL[1:0]
b7 to b2 —
NFCLKSEL[1:0] Bits (NMI Digital Filter Sampling Clock)
These bits select the cycle of the digital filter sampling clock for the NMI pin interrupt.
The sampling clock cycle can be selected from among the PCLK (every cycle), PCLK/8 (once every eight cycles),
PCLK/32 (once every 32 cycles), and PCLK/64 (once every 64 cycles).
For details of the digital filter, see section 14.4.7, Digital Filter .
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b5 b4 b3 b2
— — — — NFCLKSEL[1:0]
0 0 0 0
Bit Name
NMI Digital Filter Sampling
Clock
Reserved
b1 b0
0 0
Description
b1 b0
0 0: PCLK
0 1: PCLK/8
1 0: PCLK/32
1 1: PCLK/64
These bits are read as 0. The write value should be 0.
14. Interrupt Controller (ICUb)
R/W
R/W
R/W
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