Renesas RX100 Series User Manual page 51

32-bit mcu
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RX13T Group
Bit
Symbol
Bit Name
b8
DN
0 Flush Bit of Denormalized Number
b9
Reserved
b10
EV
Invalid Operation Exception Enable
b11
EO
Overflow Exception Enable
b12
EZ
Division-by-Zero Exception Enable
b13
EU
Underflow Exception Enable
b14
EX
Inexact Exception Enable
b25 to b15 —
Reserved
3
b26
FV*
Invalid Operation Flag
4
b27
FO*
Overflow Flag
5
b28
FZ*
Division-by-Zero Flag
6
b29
FU*
Underflow Flag
7
b30
FX*
Inexact Flag
b31
FS
Floating-Point Error Summary Flag
Note 1. Writing 0 to the bit clears it. Writing 1 to the bit does not affect its value.
Note 2. Positive denormalized numbers are treated as +0, negative denormalized numbers as –0.
Note 3. When the EV bit is set to 0, the FV flag is enabled.
Note 4. When the EO bit is set to 0, the FO flag is enabled.
Note 5. When the EZ bit is set to 0, the FZ flag is enabled.
Note 6. When the EU bit is set to 0, the FU flag is enabled.
Note 7. When the EX bit is set to 0, the FX flag is enabled.
Note 8. Once the bit has been set to 1, this value is retained until it is cleared to 0 by software.
The floating-point status word (FPSW) indicates the results of floating-point operations.
When an exception handling enable bit (Ej) enables the exception handling (Ej = 1), the exception cause can be identified
by checking the corresponding Cj flag in the exception handling routine. If the exception handling is masked (Ej = 0), the
occurrence of exception can be checked by reading the Fj flag at the end of a series of processing. Once the Fj flag has
been set to 1, this value is retained until it is cleared to 0 by software (j = X, U, Z, O, or V).
RM[1:0] Bits (Floating-Point Rounding-Mode Setting)
These bits specify the floating-point rounding-mode.
Explanation of Floating-Point Rounding Modes
 Rounding towards the nearest value (the default behavior): An inexact result is rounded to the available value that is
closest to the result which would be obtained with an infinite number of digits. If two available values are equally
close, rounding is to the even alternative.
 Rounding towards 0: An inexact result is rounded to the smallest available absolute value, i.e. in the direction of
zero (simple truncation).
 Rounding towards +: An inexact result is rounded to the nearest available value in the direction of positive
infinity.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Description
0: A denormalized number is handled as a denormalized
number.
1: A denormalized number is handled as 0.*
This bit is read as 0. The write value should be 0.
0: Invalid operation exception is masked.
1: Invalid operation exception is enabled.
0: Overflow exception is masked.
1: Overflow exception is enabled.
0: Division-by-zero exception is masked.
1: Division-by-zero exception is enabled.
0: Underflow exception is masked.
1: Underflow exception is enabled.
0: Inexact exception is masked.
1: Inexact exception is enabled.
These bits are read as 0. The write value should be 0.
0: No invalid operation has been encountered.
1: Invalid operation has been encountered.*
0: No overflow has occurred.
8
1: Overflow has occurred.*
0: No division-by-zero has occurred.
1: Division-by-zero has occurred.*
0: No underflow has occurred.
8
1: Underflow has occurred.*
0: No inexact exception has been generated.
1: Inexact exception has been generated.*
This bit reflects the logical OR of the FU, FZ, FO, and FV
flags.
R/W
R/W
2
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
8
R/W
R/W
8
R/W
R/W
8
R
Page 51 of 1041
2. CPU

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