Renesas RX100 Series User Manual page 19

20.6.1 Transition to Low Power Consumption Mode ......................................................................... 556
20.6.2 High-Impedance Control When the MTU is Not Selected ....................................................... 556
20.6.3 When the POE is Not Used ...................................................................................................... 556
21. Compare Match Timer (CMT) ...................................................................................................... 557
21.1 Overview ........................................................................................................................................... 557
21.2 Register Descriptions ......................................................................................................................... 558
21.2.1 Compare Match Timer Start Register 0 (CMSTR0) ................................................................ 558
21.2.2 Compare Match Timer Control Register (CMCR) ................................................................... 558
21.2.3 Compare Match Counter (CMCNT) ......................................................................................... 559
21.2.4 Compare Match Constant Register (CMCOR) ......................................................................... 559
21.3 Operation ........................................................................................................................................... 560
21.3.1 Periodic Count Operation ......................................................................................................... 560
21.3.2 CMCNT Count Timing ............................................................................................................ 560
21.4 Interrupts ............................................................................................................................................ 561
21.4.1 Interrupt Sources ....................................................................................................................... 561
21.4.2 Timing of Compare Match Interrupt Generation ..................................................................... 561
21.5 Usage Notes ....................................................................................................................................... 562
21.5.1 Setting the Module Stop Function ............................................................................................ 562
21.5.2 Conflict between CMCNT Counter Writing and Compare Match ........................................... 562
21.5.3 Conflict between CMCNT Counter Writing and Incrementing ............................................... 562
22. Independent Watchdog Timer (IWDTa) ........................................................................................ 563
22.1 Overview ........................................................................................................................................... 563
22.2 Register Descriptions ......................................................................................................................... 565
22.2.1 IWDT Refresh Register (IWDTRR) ......................................................................................... 565
22.2.2 IWDT Control Register (IWDTCR) ......................................................................................... 566
22.2.3 IWDT Status Register (IWDTSR) ............................................................................................ 569
22.2.4 IWDT Reset Control Register (IWDTRCR) ............................................................................ 570
22.2.5 IWDT Count Stop Control Register (IWDTCSTPR) ............................................................... 571
22.2.6 Option Function Select Register 0 (OFS0) ............................................................................... 571
22.3 Operation ........................................................................................................................................... 572
22.3.1 Count Operation in Each Start Mode ....................................................................................... 572
22.3.1.1
22.3.1.2
22.3.2 Control over Writing to the IWDTCR, IWDTRCR, and IWDTCSTPR Registers .................. 576
22.3.3 Refresh Operation ..................................................................................................................... 577
22.3.4 Status Flags ............................................................................................................................... 579
22.3.5 Reset Output ............................................................................................................................. 579
22.3.6 Interrupt Sources ....................................................................................................................... 579
22.3.7 Reading the Counter Value ....................................................................................................... 580
22.3.8 Correspondence between Option Function Select Register 0 (OFS0) and IWDT Registers ... 581
22.4 Usage Notes ....................................................................................................................................... 581
Register Start Mode ......................................................................................................... 572
Auto-Start Mode .............................................................................................................. 574