Timer Subcounter (Tcntsa); Timer Period Data Register (Tcdra) - Renesas RX100 Series User Manual

32-bit mcu
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RX13T Group
Table 19.39
Output Level Select Function
Bit 2
Bit 1
WF
VF
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
19.2.25

Timer Subcounter (TCNTSA)

Address(es): MTU.TCNTSA 0009 5220h
b15
b14
Value after reset:
0
0
Note:
TCNTSA must not be accessed in 8 bits; it should be accessed in 16 bits.
TCNTSA is a 16-bit read-only counter used only in complementary PWM mode.
The initial value of TCNTSA after a reset is 0000h.
19.2.26

Timer Period Data Register (TCDRA)

Address(es): MTU.TCDRA 0009 5214h
b15
b14
Value after reset:
1
1
Note:
TCDRA must not be accessed in 8 bits; it should be accessed in 16 bits.
TCDRA is a 16-bit readable/writable register used only in complementary PWM mode. Set half the PWM carrier period
as the TCDRA value. The TCDRA register is constantly compared with the TCNTSA counter in complementary PWM
mode, respectively. When a match occurs, the TCNTSA counter switches the count direction (down-count to up-count).
The initial value of TCDRA after a reset is FFFFh.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Bit 0
MTIOC3B
UF
U Phase
0
OFF
1
ON
0
OFF
1
OFF
0
OFF
1
ON
0
OFF
1
OFF
b13
b12
b11
b10
0
0
0
0
b13
b12
b11
b10
1
1
1
1
19. Multi-Function Timer Pulse Unit 3 (MTU3c)
Function
MTIOC4A
MTIOC4B
V Phase
W Phase
OFF
OFF
OFF
OFF
ON
OFF
ON
OFF
OFF
ON
OFF
OFF
OFF
ON
OFF
OFF
b9
b8
b7
b6
0
0
0
0
b9
b8
b7
b6
1
1
1
1
MTIOC3D
MTIOC4C
U Phase
V Phase
OFF
OFF
OFF
OFF
ON
OFF
OFF
OFF
OFF
ON
OFF
ON
ON
OFF
OFF
OFF
b5
b4
b3
b2
0
0
0
0
b5
b4
b3
b2
1
1
1
1
Page 370 of 1041
MTIOC4D
W Phase
OFF
ON
OFF
ON
OFF
OFF
OFF
OFF
b1
b0
0
0
b1
b0
1
1

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