Renesas RX100 Series User Manual page 350

RX13T Group
TGIEA and TGIEB Bits (TGR Interrupt Enable A and B)
Each bit enables or disables interrupt requests (TGIn) (n = A, B).
TGIEC and TGIED Bits (TGR Interrupt Enable C and D)
Each bit enables or disables an interrupt request (TGIn) (n = C, D).
In MTU1 and MTU2, these bits are reserved. They are read as 0. The write value should be 0.
TCIEV Bit (Overflow Interrupt Enable)
This bit enables or disables interrupt requests (TCIV).
TCIEU Bit (Underflow Interrupt Enable)
This bit enables or disables interrupt requests (TCIU).
In MTU0, MTU3, and MTU4, this bit is reserved. It is read as 0. The write value should be 0.
TTGE2 Bit (A/D Converter Start Request Enable 2)
This bit enables or disables generation of A/D converter start requests by MTUn.TCNT underflow (trough) in
complementary PWM mode (n = 4).
In MTU0 to MTU3, this bit is reserved. It is read as 0. The write value should be 0.
TTGE Bit (A/D Converter Start Request Enable)
This bit enables or disables generation of A/D converter start requests by TGRA input capture/compare match.
 MTU0.TIER2
Address(es): MTU0.TIER2 0009 5324h
b7 b6
TTGE2 —
0 0
Value after reset:
Bit Symbol Bit Name
b0 TGIEE TGR Interrupt Enable E
b1 TGIEF TGR Interrupt Enable F
b6 to b2 — Reserved
b7 TTGE2 A/D Converter Start Request Enable 2
TGIEE and TGIEF Bits (TGR Interrupt Enable E and F)
Each bit enables or disables interrupt requests by compare match between MTU0.TCNT and MTU0.TGRn (n = E, F).
TTGE2 Bit (A/D Converter Start Request Enable 2)
Each bit enables or disables A/D converter start requests by compare match between MTU0.TCNT and MTU0.TGRE.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b5 b4 b3 b2
— — — — TGIEF TGIEE
0 0 0 0
19. Multi-Function Timer Pulse Unit 3 (MTU3c)
b1 b0
0 0
Description
0: Interrupt requests (TGIE) disabled
1: Interrupt requests (TGIE) enabled
0: Interrupt requests (TGIF) disabled
1: Interrupt requests (TGIF) enabled
These bits are read as 0. The write value should be 0.
0: A/D converter start request generation by compare match
between MTU0.TCNT and MTU0.TGRE disabled
1: A/D converter start request generation by compare match
between MTU0.TCNT and MTU0.TGRE enabled
R/W
R/W
R/W
R/W
R/W
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