Renesas RX100 Series User Manual page 130

RX13T Group
XTAL
Main clock
oscillator
EXTAL
High-speed
on-chip oscillator
Low-speed
on-chip oscillator
IWDT-dedicated
on-chip oscillator
Figure 9.1 Block Diagram of Clock Generation Circuit
Table 9.2 lists the I/O pins of the clock generation circuit.
Table 9.2 I/O Pins of Clock Generation Circuit
Pin Name I/O
XTAL Output
EXTAL Input
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
PLIDIV[1:0] STC[5:0]
PLLCR PLLCR
PLL
Frequency
divider circuit
MSTS[4:0]
MOSCWTCR
Wait
control
Main clock
HOCO clock
LOCO clock
IWDT-dedicated low-speed clock
Description
These pins are used to connect a crystal. The EXTAL pin can also be used to input an
external clock. For details, refer to section 9.3.2, External Clock Input.
Frequency
divider
CKSEL[2:0]
1/1
SCKCR3
1/2
1/4
1/8
1/16
1/32
1/64
9. Clock Generation Circuit
SCKCR
FCK[3:0]
FlashIF clock (FCLK)
To FlashIF
SCKCR
ICK[3:0]
System clock (ICLK)
To CPU, DTC, ROM,
and RAM
SCKCR
PCKB[3:0], PCKD[3:0]
Peripheral module clock
(PCLKB, PCLKD)
To peripheral module
IWDT-dedicated clock (IWDTCLK)
To IWDT
(CACILCLK)
CAC clock
(CACLCLK)
(CACHCLK)
To CAC
(CACMCLK)
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