Renesas RX100 Series User Manual page 15

17. I/O Ports ....................................................................................................................................... 293
17.1 Overview ........................................................................................................................................... 293
17.2 I/O Port Configuration ....................................................................................................................... 295
17.3 Register Descriptions ......................................................................................................................... 297
17.3.1 Port Direction Register (PDR) .................................................................................................. 297
17.3.2 Port Output Data Register (PODR) .......................................................................................... 298
17.3.3 Port Input Data Register (PIDR) .............................................................................................. 299
17.3.4 Port Mode Register (PMR) ....................................................................................................... 300
17.3.5 Open Drain Control Register 0 (ODR0) ................................................................................... 301
17.3.6 Open Drain Control Register 1 (ODR1) ................................................................................... 302
17.3.7 Pull-Up Control Register (PCR) ............................................................................................... 303
17.3.8 Drive Capacity Control Register (DSCR) ................................................................................ 304
17.4 Initialization of the Port Direction Register (PDR) ........................................................................... 305
17.5 Handling of Unused Pins ................................................................................................................... 306
18. Multi-Function Pin Controller (MPC) ............................................................................................ 307
18.1 Overview ........................................................................................................................................... 307
18.2 Register Descriptions ......................................................................................................................... 310
18.2.1 Write-Protect Register (PWPR) ................................................................................................ 310
18.2.2 P1n Pin Function Control Register (P1nPFS) (n = 0, 1) .......................................................... 311
18.2.3 P2n Pin Function Control Register (P2nPFS) (n = 2 to 4) ....................................................... 312
18.2.4 P4n Pin Function Control Register (P4nPFS) (n = 0 to 7) ....................................................... 313
18.2.5 P7n Pin Function Control Register (P7nPFS) (n = 0 to 6) ....................................................... 314
18.2.6 P9n Pin Function Control Register (P9nPFS) (n = 3, 4) .......................................................... 315
18.2.7 PAn Pin Function Control Register (PAnPFS) (n = 2, 3) ......................................................... 316
18.2.8 PBn Pin Function Control Register (PBnPFS) (n = 0 to 7) ...................................................... 317
18.2.9 PDn Pin Function Control Register (PDnPFS) (n = 3 to 6) ..................................................... 318
18.2.10 PE2 Pin Function Control Register (PE2PFS) ......................................................................... 319
18.3 Usage Notes ....................................................................................................................................... 320
18.3.1 Procedure for Specifying Input/Output Pin Function ............................................................... 320
18.3.2 Notes on MPC Register Setting ................................................................................................ 320
18.3.3 Note on Using Analog Functions ............................................................................................. 321
18.3.4 Note on PB1 Pin Input Level .................................................................................................... 321
19. Multi-Function Timer Pulse Unit 3 (MTU3c) ................................................................................. 322
19.1 Overview ........................................................................................................................................... 322
19.2 Register Descriptions ......................................................................................................................... 327
19.2.1 Timer Control Register (TCR) ................................................................................................. 327
19.2.2 Timer Control Register 2 (TCR2) ............................................................................................ 329
19.2.3 Timer Mode Register 1 (TMDR1) ............................................................................................ 333
19.2.4 Timer Mode Register 2 (TMDR2A) ......................................................................................... 335
19.2.5 Timer Mode Register 3 (TMDR3) ............................................................................................ 336
19.2.6 Timer I/O Control Register (TIOR) .......................................................................................... 337