RX13T Group
Counter value
100%
Refresh-
prohibited
period
75%
Refresh-
50%
permitted
period
25%
Refresh-
prohibited
period
0%
RES# pin
IWDTCR
(1)
register
(1) Initial value
Writing to the
(2) Set value
register is valid.
Refresh
H
the counter
L
(active high)
Counting starts
REFEF flag
UNDFF flag
Interrupt request
H
(WUNI)
(active low)
Reset output
H
from IWDT
L
(active high)
Figure 22.3
Operation Example in Register Start Mode
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
(2)
Writing to the
register is invalid.
Counting starts
Underflow
Status flag
cleared
22. Independent Watchdog Timer (IWDTa)
(2)
Writing to the
register is invalid.
Counting starts
Refresh error
Status flag
cleared
(2)
Refresh error
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