Open Drain Control Register 0 (Odr0) - Renesas RX100 Series User Manual

32-bit mcu
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17.3.5

Open Drain Control Register 0 (ODR0)

Address(es): PORT1.ODR0 0008 C082h, PORT2.ODR0 0008 C084h, PORT7.ODR0 0008 C08Eh, PORT9.ODR0 0008 C092h,
PORTA.ODR0 0008 C094h, PORTB.ODR0 0008 C096h, PORTD.ODR0 0008 C09Ah
b7
b6
B6
0
0
Value after reset:
Bit
Symbol
Bit Name
b0
B0
Pm0 Output Type Select
b1
B1
b2
B2
Pm1 Output Type Select
b3
Reserved
b4
B4
Pm2 Output Type Select
b5
Reserved
b6
B6
Pm3 Output Type Select
b7
Reserved
m = 1, 2, 7, 9, A, B, D
Bits corresponding to port m on the 48 pin-product but which do not exist on a product with fewer than 48 pins are
reserved. Write 0 to these bits.
The bits corresponding to a pin that does not exist or pins with no open-drain output allocation are reserved. A reserved
bit is read as 0. The write value should be 0.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b5
b4
b3
b2
B4
B2
0
0
0
0
b1
b0
B1
B0
0
0
Description
 P10, P70
b0
0: CMOS output
1: N-channel open-drain
b1
This bit is read as 0. The write value should be 0.
 PB0
b1 b0
0 0: CMOS output
0 1: N-channel open-drain
1 0: P-channel open-drain
1 0: Hi-Z
0: CMOS output
1: N-channel open-drain
This bit is read as 0. The write value should be 0.
0: CMOS output
1: N-channel open-drain
This bit is read as 0. The write value should be 0.
0: CMOS output
1: N-channel open-drain
This bit is read as 0. The write value should be 0.
17. I/O Ports
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
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