A/D Converter Start Request Delaying Function - Renesas RX100 Series User Manual

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19.3.9

A/D Converter Start Request Delaying Function

A/D converter start requests can be issued in MTU4 by making settings in the timer A/D converter start request control
register (MTU4.TADCR), timer A/D converter start request cycle set registers (MTU4.TADCORA and
MTU4.TADCORB), and timer A/D converter start request cycle set buffer registers (MTU4.TADCOBRA and
MTU4.TADCOBRB).
The A/D converter start request delaying function compares MTU4.TCNT with MTU4.TADCORA or
MTU4.TADCORB, and when their values match, the function issues a respective A/D converter start request (TRG4AN
or TRG4BN).
A/D converter start requests (TRG4AN and TRG4BN) can be skipped in coordination with interrupt skipping by making
settings in the ITA3AE, ITA4VE, ITB3AE, and ITB4VE bits in MTU4.TADCR.
(1) Example of Procedure for Specifying A/D Converter Start Request Delaying Function
Figure 19.83 shows an example of procedure for specifying the A/D converter start request delaying function.
A/D converter start request
delaying function
Set A/D converter start request cycle
• Set the timing of transfer
from cycle set buffer register
• Set linkage with interrupt skipping
• Enable A/D converter start
request delaying function
A/D converter start request
delaying function
Figure 19.83
Example of Procedure for Specifying A/D Converter Start Request Delaying Function
(MTU3 and MTU4)
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
[1] Set the cycle in the timer A/D converter start request cycle buffer register
(MTU4.TADCOBRA or MTU4.TADCOBRB) and timer A/D converter start
request cycle register (MTU4.TADCORA or MTU4.TADCORB).
(When the timing of transfer from the cycle buffer register to cycle register is
set to the trough, or both trough and crest in step [2] below, the same initial
value must be specified in the cycle buffer register and cycle register because
transfer is performed immediately after counting starts.)
[1]
[2] Use the BF[1:0] bits in the timer A/D converter start request control register
(MTU4.TADCR) to specify the timing of transfer from the timer A/D converter
start request cycle buffer register to A/D converter start request cycle register.
• Specify whether to link with interrupt skipping through the ITA3AE, ITA4VE,
[2]
ITB3AE, and ITB4VE bits.
• Use the UT4AE, DT4AE, UT4BE, and DT4BE bits to enable A/D converter
start requests (TRG4AN or TRG4BN).
Note:
Perform MTU4.TADCR setting while MTU4.TCNT is stopped.
Note:
Set MTU4.TADCR.BF1 to 0 when complementary PWM mode is not
selected.
Note:
Set ITA3AE, ITA4VE, ITB3AE, ITB4VE, DT4AE, and DT4BE to 0 when
complementary PWM mode is not selected.
Note:
Set the ITA3AE, ITA4VE, ITB3AE, and ITB4VE bits to 0 when interrupt
skipping is disabled.
19. Multi-Function Timer Pulse Unit 3 (MTU3c)
Page 458 of 1041

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