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Renesas RL78/I1A Manuals
Manuals and User Guides for Renesas RL78/I1A. We have
5
Renesas RL78/I1A manuals available for free PDF download: User Manual
Renesas RL78/I1A User Manual (1176 pages)
16-Bit Single-Chip
Brand:
Renesas
| Category:
Microcontrollers
| Size: 9 MB
Table of Contents
Table of Contents
6
Chapter 1 Outline
25
Features
25
List of Part Numbers
27
Pin Configuration (Top View)
28
20-Pin Products
28
30-Pin Products
29
38-Pin Products
30
Pin Identification
31
Block Diagram
32
20-Pin Products
32
30-Pin Products
33
38-Pin Products
34
Outline of Functions
35
Chapter 2 Pin Functions
38
Port Function
38
20-Pin Products
39
30-Pin Products
40
38-Pin Products
42
Functions Other than Port Pins
44
Functions for each Product
44
Description of Functions
46
Connection of Unused Pins
48
Block Diagrams of Pins
50
Chapter 3 Cpu Architecture
62
Memory Space
62
Internal Program Memory Space
67
Mirror Area
70
Internal Data Memory Space
72
Special Function Register (SFR) Area
73
Extended Special Function Register (2Nd SFR: 2Nd Special Function Register) Area
73
Data Memory Addressing
74
Processor Registers
77
Control Registers
77
General-Purpose Registers
79
And CS Registers
80
Special Function Registers (Sfrs)
81
Extended Special Function Registers (2Nd Sfrs: 2Nd Special Function Registers)
86
Instruction Address Addressing
99
Relative Addressing
99
Immediate Addressing
99
Register Indirect Addressing
100
Addressing for Processing Data Addresses
101
Implied Addressing
101
Register Addressing
101
Direct Addressing
102
Short Direct Addressing
103
SFR Addressing
104
Register Indirect Addressing
105
Based Addressing
106
Based Indexed Addressing
110
Stack Addressing
111
Chapter 4 Port Functions
115
Port Functions
115
Port Configuration
115
Port 12
115
Port 0
116
Port 1
116
Port 2
117
Port 3
117
Port 4
117
Port 7
117
Port 13
118
Port 14
118
Port 20
118
Registers Controlling Port Function
119
Port Mode Registers (Pmxx)
122
Port Registers (Pxx)
123
Pull-Up Resistor Option Registers (Puxx)
124
Port Input Mode Registers (Pimxx)
125
Port Output Mode Registers (Pomxx)
125
Port Mode Control Registers (Pmcxx)
126
A/D Port Configuration Register (ADPC)
127
Peripheral I/O Redirection Register (PIOR1)
128
Port Function Operations
129
Writing to I/O Port
129
Reading from I/O Port
129
Operations on I/O Port
129
Handling Different Potential (2.5 V, 3 V)
130
Handling Different Potential (2.5 V, 3 V) by Using I/O Buffers
130
Register Settings When Using Alternate Function
132
Basic Concept When Using Alternate Function
132
Register Settings for Alternate Function Whose Output Function Is Not Used
133
Register Setting Examples for Used Port and Alternate Functions
134
Cautions When Using Port Function
141
Cautions on 1-Bit Manipulation Instruction for Port Register N (Pn)
141
Notes on Specifying the Pin Settings
142
Chapter 5 Clock Generator
143
Functions of Clock Generator
143
Configuration of Clock Generator
145
Registers Controlling Clock Generator
148
Clock Operation Mode Control Register (CMC)
148
System Clock Control Register (CKC)
151
Clock Operation Status Control Register (CSC)
152
Oscillation Stabilization Time Counter Status Register (OSTC)
153
Oscillation Stabilization Time Select Register (OSTS)
155
PLL Control Register (PLLCTL)
157
Peripheral Enable Registers 0 to 2 (PER0 to PER2)
158
Subsystem Clock Supply Mode Control Register (OSMC)
161
High-Speed On-Chip Oscillator Frequency Select Register (HOCODIV)
162
High-Speed On-Chip Oscillator Trimming Register (HIOTRM)
163
System Clock Oscillator
164
X1 Oscillator
164
XT1 Oscillator
164
High-Speed On-Chip Oscillator
168
Low-Speed On-Chip Oscillator
168
PLL (Phase Locked Loop)
168
Clock Generator Operation
169
Controlling Clock
171
Example of Setting High-Speed On-Chip Oscillator
171
Example of Setting X1 Oscillation Clock
172
Example of Setting XT1 Oscillation Clock
173
Example of Setting PLL Circuit
174
CPU Clock Status Transition Diagram
175
Condition before Changing CPU Clock and Processing after Changing CPU Clock
182
Time Required for Switchover of CPU Clock and System Clock
184
Conditions before Clock Oscillation Is Stopped
185
Chapter 6 Timer Array Unit
186
Functions of Timer Array Unit
187
Independent Channel Operation Function
187
Simultaneous Channel Operation Function
188
LIN-Bus Supporting Function (Channel 7 Only)
190
DMX512 Supporting Function (Channel 7 Only)
190
Configuration of Timer Array Unit
191
Timer/Counter Register 0N (Tcr0N)
196
Timer Data Register 0N (Tdr0N)
197
Registers Controlling Timer Array Unit
198
Peripheral Enable Register 0 (PER0)
199
Timer Clock Select Register 0 (TPS0)
200
Timer Mode Register 0N (Tmr0N)
203
Timer Status Register 0N (Tsr0N)
208
Timer Channel Enable Status Register 0 (TE0)
209
Timer Channel Start Register 0 (TS0)
210
Timer Channel Stop Register 0 (TT0)
211
Timer Input Select Register 0 (TIS0)
212
Timer Output Enable Register 0 (TOE0)
213
Timer Output Register 0 (TO0)
214
Timer Output Level Register 0 (TOL0)
215
Timer Output Mode Register 0 (TOM0)
216
Input Switch Control Register (ISC)
217
Noise Filter Enable Register 1 (NFEN1)
218
Registers Controlling Port Functions of Pins to be Used for Timer I/O
219
Basic Rules of Timer Array Unit
220
Basic Rules of Simultaneous Channel Operation Function
220
8-Bit Timer Operation Function Overview (Only Channels 1 and 3)
222
Operation of Counter
223
Count Clock (F )
223
Start Timing of Counter
225
Operation of Counter
226
Channel Output (To0N Pin) Control
231
To0N Pin Output Circuit Configuration
231
To0N Pin Output Setting
232
Cautions on Channel Output Operation
233
Collective Manipulation of To0N Bit
238
Timer Interrupt and To0N Pin Output at Operation Start
239
Timer Input (Ti0N) Control
240
Ti0N Input Circuit Configuration
240
Noise Filter
240
Cautions on Channel Input Operation
241
Independent Channel Operation Function of Timer Array Unit
242
Operation as Interval Timer/Square Wave Output
242
Operation as External Event Counter
248
Operation as Input Pulse Interval Measurement
253
Operation as Input Signal High-/Low-Level Width Measurement
258
Operation as Delay Counter
263
Simultaneous Channel Operation Function of Timer Array Unit
268
Operation as One-Shot Pulse Output Function
268
Operation as PWM Function
275
Operation as Multiple PWM Output Function
282
Cautions When Using Timer Array Unit
291
Cautions When Using Timer Output
291
Chapter 7 16-Bit Timers Kb0, Kb1, and Kb2
292
Functions of 16-Bit Timers KB0, KB1, and KB2
292
Configuration of 16-Bit Timers KB0, KB1, and KB2
294
16-Bit Timer KB Compare Registers N0 to N3 (Tkbcrn0 to Tkbcrn3)
296
16-Bit Timer KB Trigger Compare Register N (Tkbtgcrn)
296
Registers Controlling 16-Bit Timers KB0, KB1, and KB2
297
Peripheral Enable Register 2 (PER2)
298
Timer Clock Select Register 2 (TPS2)
299
16-Bit Timer KB Operation Control Register N0 (Tkbctln0)
300
16-Bit Timer KB Operation Control Register N1 (Tkbctln1)
302
16-Bit Timer KB Output Control Register N0 (Tkbiocn0)
303
16-Bit Timer KB Output Control Register N1 (Tkbiocn1)
304
16-Bit Timer KB Flag Register N (Tkbflgn)
305
16-Bit Timer KB Trigger Register N (Tkbtrgn)
306
16-Bit Timer KB Flag Clear Trigger Register N (Tkbclrn)
307
16-Bit Timer KB Dithering Count Registers N0, N1 (Tkbdnrn0, Tkbdnrn1)
308
16-Bit Timer KB Compare 1L & Dithering Count Register N0 (Tkbcrldn0)
309
16-Bit Timer KB Compare 3L & Dithering Count Register N1 (Tkbcrldn1)
309
16-Bit Timer KB Smooth Start Initial Duty Registers N0, N1 (Tkbsirn0, Tkbsirn1)
310
16-Bit Timer KB Smooth Start Step Width Registers N0, N1 (Tkbssrn0, Tkbssrn1)
310
16-Bit Timer KB Maximum Frequency Limit Setting Register N (Tkbmfrn)
311
Peripheral Function Switch Register 0 (PFSEL0)
312
Port Mode Register 20 (PM20)
313
Operation of 16-Bit Timers KB0, KB1 and KB2
314
Counter Basic Operation
317
Default Level and Active Level
317
Stop/Restart Operation
321
Batch Overwrite Operation
324
Standalone Mode (Period Controlled by Tkbcrn0)
325
Standalone Mode (Period Controlled by External Trigger Input)
331
Simultaneous Start/Stop Mode
338
Synchronous Start/Clear Mode
347
Interleave PFC (Power Factor Correction) Output Mode
355
Option Function of 16-Bit Timers KB0, KB1 and KB2
368
A/D Conversion Start Timing Signal Output Function
369
PWM Output Dithering Function
371
PWM Output Smooth Start Function
375
PWM Output Gate Function (Without Combining with PWM Output Smooth Start Function)
378
PWM Output Gate Function (Combining with PWM Output Smooth Start Function)
380
Maximum Frequency Limit Function
382
Forced Output Stop Function
384
Forced Output Stop Function 1 and 2
385
Configuration of Forced Output Stop Function
387
Registers Controlling Forced Output Stop Function
388
Peripheral Enable Register 2 (PER2)
388
Forced Output Stop Function Control Registers N0, N1 (Tkbpactln0, Tkbpactln1)
389
Forced Output Stop Function Control Register N2 (Tkbpactln2)
395
Forced Output Stop Function Flag Register (Tkbpaflgn)
396
Forced Output Stop Function 1 Start Trigger Register N (Tkbpahfsn)
397
Forced Output Stop Function Cancel 1 Trigger Register N (Tkbpahftn)
397
Operation of Forced Output Stop Function 1
398
Summary for Forced Output Stop Function 1
398
Software Cancel Operation for Forced Output Stop Function 1
399
Basic Operation of Forced Output Stop Function 1
400
Operation of Forced Output Stop Function 2
404
Summary for Forced Output Stop Function 2
404
Basic Operation of Forced Output Stop Function 2
405
Chapter 8 16-Bit Timer Kc0
407
Functions of 16-Bit Timer KC0
407
Configuration of 16-Bit Timer KC0
407
16-Bit Timer KC Compare Register 0 (TKCCR0)
409
16-Bit Timer KC Duty Compare Registers 00 to 05 (TKCDUTY00 to TKCDUTY05)
409
Registers Controlling 16-Bit Timer KC0
410
Peripheral Enable Register 2 (PER2)
411
Timer Clock Select Register 2 (TPS2)
412
16-Bit Timer KC Operation Control Register 0 (TKCCTL0)
413
16-Bit Timer KC Output Control Register 00 (TKCIOC00)
414
16-Bit Timer KC Output Control Register 01 (TKCIOC01)
415
16-Bit Timer KC Output Pin Control Register (TOETKC0)
415
16-Bit Timer KC Output Flag Register 0 (TKCTOF0)
416
16-Bit Timer KC Flag Register 0 (TKCFLG0)
416
16-Bit Timer KC Trigger Register 0 (TKCTRG0)
417
Port Mode Registers 1, 20 (PM1, PM20)
418
Operation of 16-Bit Timer KC0
419
PWM Output Function
421
Stop/Restart Operation
424
Default Level and Active Level
426
Simultaneous Start & Stop Mode
428
Chapter 9 Real-Time Clock
429
Functions of Real-Time Clock
429
Configuration of Real-Time Clock
429
Registers Controlling Real-Time Clock
431
Peripheral Enable Register 0 (PER0)
432
Subsystem Clock Supply Mode Control Register (OSMC)
433
Real-Time Clock Control Register 0 (RTCC0)
433
Real-Time Clock Control Register 1 (RTCC1)
435
Second Count Register (SEC)
437
Minute Count Register (MIN)
437
Hour Count Register (HOUR)
438
Day Count Register (DAY)
440
Week Count Register (WEEK)
441
Month Count Register (MONTH)
442
Year Count Register (YEAR)
442
Watch Error Correction Register (SUBCUD)
443
Alarm Minute Register (ALARMWM)
444
Alarm Hour Register (ALARMWH)
444
Alarm Week Register (ALARMWW)
444
Port Mode Register 3 (PM3)
445
Port Register 3 (P3)
445
Real-Time Clock Operation
446
Starting Operation of Real-Time Clock
446
Shifting to HALT/STOP Mode after Starting Operation
447
Reading/Writing Real-Time Clock
448
Setting Alarm of Real-Time Clock
450
Hz Output of Real-Time Clock
451
Example of Watch Error Correction of Real-Time Clock
452
Chapter 10 12-Bit Interval Timer
457
Functions of 12-Bit Interval Timer
457
Configuration of 12-Bit Interval Timer
457
Registers Controlling 12-Bit Interval Timer
458
Peripheral Enable Register 0 (PER0)
458
Subsystem Clock Supply Mode Control Register (OSMC)
459
Interval Timer Control Register (ITMC)
460
12-Bit Interval Timer Operation
461
12-Bit Interval Timer Operation Timing
461
Start of Count Operation and Re-Enter to HALT/STOP Mode after Returned from HALT/STOP
462
Mode
462
Chapter 11 Watchdog Timer
463
Functions of Watchdog Timer
463
Configuration of Watchdog Timer
463
Register Controlling Watchdog Timer
465
Watchdog Timer Enable Register (WDTE)
465
Operation of Watchdog Timer
466
Controlling Operation of Watchdog Timer
466
Setting Overflow Time of Watchdog Timer
467
Setting Window Open Period of Watchdog Timer
467
Setting Watchdog Timer Interval Interrupt
469
Chapter 12 A/D Converter
470
Function of A/D Converter
470
Configuration of A/D Converter
473
Registers Controlling A/D Converter
475
Peripheral Enable Register 0 (PER0)
476
A/D Converter Mode Register 0 (ADM0)
477
A/D Converter Mode Register 1 (ADM1)
486
A/D Converter Mode Register 2 (ADM2)
487
10-Bit A/D Conversion Result Register (ADCR)
489
8-Bit A/D Conversion Result Register (ADCRH)
489
Analog Input Channel Specification Register (ADS)
490
Conversion Result Comparison Upper Limit Setting Register (ADUL)
492
Conversion Result Comparison Lower Limit Setting Register (ADLL)
492
A/D Test Register (ADTES)
493
Registers Controlling Port Function of Analog Input Pins
494
A/D Converter Conversion Operations
495
Input Voltage and Conversion Results
497
A/D Converter Operation Modes
498
Software Trigger Mode (Select Mode, Sequential Conversion Mode)
498
Software Trigger Mode (Select Mode, One-Shot Conversion Mode)
499
Software Trigger Mode (Scan Mode, Sequential Conversion Mode)
500
Software Trigger Mode (Scan Mode, One-Shot Conversion Mode)
501
Hardware Trigger No-Wait Mode (Select Mode, Sequential Conversion Mode)
502
Hardware Trigger No-Wait Mode (Select Mode, One-Shot Conversion Mode)
503
Hardware Trigger No-Wait Mode (Scan Mode, Sequential Conversion Mode)
504
Hardware Trigger No-Wait Mode (Scan Mode, One-Shot Conversion Mode)
505
Hardware Trigger Wait Mode (Select Mode, Sequential Conversion Mode)
506
Hardware Trigger Wait Mode (Select Mode, One-Shot Conversion Mode)
507
Hardware Trigger Wait Mode (Scan Mode, Sequential Conversion Mode)
508
Hardware Trigger Wait Mode (Scan Mode, One-Shot Conversion Mode)
509
A/D Converter Setup Flowchart
510
Setting up Software Trigger Mode
511
Setting up Hardware Trigger No-Wait Mode
512
Setting up Hardware Trigger Wait Mode
513
Setup When Temperature Sensor Output Voltage/Internal Reference Voltage Is Selected
514
(Example for Software Trigger Mode and One-Shot Conversion Mode)
514
Setting up Test Mode
515
SNOOZE Mode Function
516
How to Read A/D Converter Characteristics Table
520
Cautions for A/D Converter
522
Chapter 13 Programmable Gain Amplifier
526
Functions of Programmable Gain Amplifier
526
Configuration of Programmable Gain Amplifier
526
Registers Used in Operational Amplifier
527
Peripheral Enable Register 2 (PER2)
528
Programmable Gain Amplifier Control Register
529
Programmable Gain Amplifier Input Channel Select Register
530
A/D Port Configuration Register (ADPC)
531
Port Mode Control Registers 0, 14 (PMC0, PMC14)
532
Port Mode Registers 0, 2, 14 (PM0, PM2, PM14)
533
Comparator and PGA Internal Reference Voltage Control Register (CVRCTL)
535
Operation of Programmable Gain Amplifier
536
Setting Procedure of Programmable Gain Amplifier
537
Chapter 14 Comparator
538
Functions of Comparator
538
Configuration of Comparator
540
Registers Controlling Comparator
540
Peripheral Enable Register 2 (PER2)
541
Comparator N Control Register (Cnctl)
541
Comparator and PGA Internal Reference Voltage Control Register (CVRCTL)
543
Comparator Internal Reference Voltage Select Register M (Cmrvm)
544
Register 0 (CMPEGN0)
545
Comparator Output Monitor Register (CMPMON)
546
Window Comparator Function Setting Register (CMPWDC)
547
Comparator Input Switch Control Register (CMPSEL) (20-Pin Products Only)
548
External Interrupt Control Register (INTPCTL)
548
A/D Port Configuration Register (ADPC)
549
Peripheral Function Switch Register 0 (PFSEL0)
550
Port Mode Control Registers 0, 14 (PMC0, PMC14)
552
Port Mode Registers 0, 2, 14 (PM0, PM2, PM14)
553
Setting Procedure of Comparator
555
Caution for Using Timer KB Simultaneous Operation Function
558
Chapter 15 Serial Array Unit 0
561
Functions of Serial Array Unit 0
562
3-Wire Serial I/O (CSI00)
562
Uart (Uart0, Uart1)
563
Configuration of Serial Array Unit 0
564
Shift Register
566
Lower 8/9 Bits of the Serial Data Register Mn (Sdrmn)
566
Registers Controlling Serial Array Unit 0
568
Peripheral Enable Register 0 (PER0)
569
Serial Clock Select Register M (Spsm)
570
Serial Mode Register Mn (Smrmn)
571
Serial Communication Operation Setting Register Mn (Scrmn)
572
Higher 7 Bits of the Serial Data Register Mn (Sdrmn)
575
Serial Flag Clear Trigger Register Mn (Sirmn)
577
Serial Status Register Mn (Ssrmn)
578
Serial Channel Start Register M (Ssm)
580
Serial Channel Stop Register M (Stm)
581
Serial Channel Enable Status Register M (Sem)
582
Serial Output Enable Register M (Soem)
583
Serial Output Register M (Som)
584
Serial Output Level Register M (Solm)
585
Serial Standby Control Register 0 (SSC0)
586
Input Switch Control Register (ISC)
587
Noise Filter Enable Register 0 (NFEN0)
588
Registers Controlling Port Functions of Serial I/O Pins
589
Operation Stop Mode
590
Stopping the Operation Per Unit
590
Stopping the Operation by Channels
591
Operation of 3-Wire Serial I/O (CSI00) Communication
592
Master Transmission
594
Master Reception
603
Master Transmission/Reception
612
Slave Transmission
622
Slave Reception
632
Slave Transmission/Reception
639
SNOOZE Mode Function
649
Calculating Transfer Clock Frequency
653
Procedure for Processing Errors that Occurred During 3-Wire Serial I/O (CSI00)
655
Communication
655
Operation of UART (UART0, UART1) Communication
656
UART Transmission
658
UART Reception
668
SNOOZE Mode Function
675
Calculating Baud Rate
683
Procedure for Processing Errors that Occurred During UART (UART0, UART1)
687
Communication
687
LIN Communication Operation
688
LIN Transmission
688
LIN Reception
691
DMX512 Communication Operation
696
Chapter 16 Serial Array Unit 4 (Dali/Uart4)
697
Functions of Serial Array Unit 4 (DALI/UART4)
697
Configuration of Serial Array Unit 4 (DALI/UART4)
699
Shift Register
701
Lower 9 Bits of the Serial Data Register 4N (Sdr4N)
701
DALI Transmit Data Registers H4, L4 (SDTH4, SDTL4)
702
DALI Receive Data Registers H4, L4 (SDCH4, SDCL4)
703
Registers Controlling Serial Array Unit 4 (DALI/UART4)
704
Peripheral Enable Register 1 (PER1)
705
Serial Clock Select Register 4 (SPS4)
706
Serial Mode Register 4N (Smr4N)
708
Serial Communication Operation Setting Register 4N (Scr4N)
709
Higher 7 Bits of the Serial Data Register 4N (Sdr4N)
711
Serial Status Register 4N (Ssr4N)
712
Serial Flag Clear Trigger Register 4N (Sir4N)
715
Serial Channel Start Register 4 (SS4)
716
Serial Channel Stop Register 4 (ST4)
717
Serial Channel Enable Status Register 4 (SE4)
718
Serial Output Enable Register 4 (SOE4)
719
Serial Output Register 4 (SO4)
720
Serial Output Level Register 4 (SOL4)
721
Serial Standby Control Register 4 (SSC4)
722
Serial Option Control Register 4 (SOC4)
723
Single-Wire UART Control Register (SUCTL)
723
Noise Filter Enable Register 3 (NFEN3)
724
Port Output Mode Registers 1, 20 (POM1, POM20)
724
Port Mode Registers 1, 20 (PM1, PM20)
725
Peripheral I/O Redirection Register (PIOR1)
726
Operation Stop Mode
727
Stopping the Operation by Units
727
Stopping the Operation by Channels
728
Communication Operation of UART
729
UART Transmission
729
UART Reception
739
SNOOZE Mode Function
746
DALI Mode
754
DALI Transmission
757
DALI Reception
765
Standby Function (Only DALI/UART4 Reception)
772
Single-Wire Data Mode
774
Calculating Baud Rate
775
Procedure for Processing Errors that Occurred During DALI/UART4
780
Communication
780
DMX512 Communication Operation
781
Chapter 17 Serial Interface Iica
786
Functions of Serial Interface IICA
786
Serial Interface IICA
786
Configuration of Serial Interface IICA
789
Registers Controlling Serial Interface IICA
792
Peripheral Enable Register 0 (PER0)
792
IICA Control Register 00 (IICCTL00)
793
IICA Status Register 0 (IICS0)
798
IICA Flag Register 0 (IICF0)
800
IICA Control Register 01 (IICCTL01)
802
IICA Low-Level Width Setting Register 0 (IICWL0)
804
IICA High-Level Width Setting Register 0 (IICWH0)
804
Port Mode Register 1 (PM1)
805
Port Output Mode Register 1 (POM1)
805
I 2 C Bus Mode Functions
806
Pin Configuration
806
Setting Transfer Clock by Using IICWL0 and IICWH0 Registers
807
I 2 C Bus Definitions and Control Methods
808
Start Conditions
808
Addresses
809
Transfer Direction Specification
809
Acknowledge (ACK)
810
Stop Condition
811
Wait
812
Canceling Wait
814
Interrupt Request (INTIICA0) Generation Timing and Wait Control
815
Address Match Detection Method
816
Error Detection
816
Extension Code
816
Arbitration
817
Wakeup Function
819
Communication Reservation
822
Cautions
826
Communication Operations
827
Timing of I C Interrupt Request (INTIICA0) Occurrence
834
Timing Charts
855
Chapter 18 Multiplier and Divider/Multiply-Accumulator
870
Functions of Multiplier and Divider/Multiply-Accumulator
870
Configuration of Multiplier and Divider/Multiply-Accumulator
870
Multiplication/Division Data Register a (MDAH, MDAL)
872
Multiplication/Division Data Register B (MDBL, MDBH)
873
Multiplication/Division Data Register C (MDCL, MDCH)
874
Register Controlling Multiplier and Divider/Multiply-Accumulator
876
Multiplication/Division Control Register (MDUC)
876
Operations of Multiplier and Divider/Multiply-Accumulator
878
Multiplication (Unsigned) Operation
878
Multiplication (Signed) Operation
879
Multiply-Accumulation (Unsigned) Operation
880
Multiply-Accumulation (Signed) Operation
882
Division Operation
884
Chapter 19 Dma Controller
886
Functions of DMA Controller
886
Configuration of DMA Controller
887
DMA SFR Address Register N (Dsan)
887
DMA RAM Address Register N (Dran)
888
DMA Byte Count Register N (Dbcn)
889
Registers Controlling DMA Controller
890
DMA Mode Control Register N (Dmcn)
891
DMA Operation Control Register N (Drcn)
893
Operation of DMA Controller
894
Operation Procedure
894
Transfer Mode
895
Termination of DMA Transfer
895
Example of Setting of DMA Controller
896
CSI Consecutive Transmission
896
Consecutive Capturing of A/D Conversion Results
898
UART Consecutive Reception + ACK Transmission
900
Holding DMA Transfer Pending by Dwaitn Bit
901
Forced Termination by Software
902
Cautions on Using DMA Controller
904
Chapter 20 Interrupt Functions
907
Interrupt Function Types
907
Interrupt Sources and Configuration
907
Registers Controlling Interrupt Functions
913
Priority Specification Flag Registers
913
Interrupt Request Flag Registers (IF0L, IF0H, IF1L, IF1H, IF2L, IF2H)
917
Interrupt Mask Flag Registers (MK0L, MK0H, MK1L, MK1H, MK2L, MK2H)
919
Pr10H, Pr11L, Pr11H, Pr12L, Pr12H)
920
Edge Enable Registers (EGN0, EGN1, EGN2)
922
Comparator Rising Edge Enable Register 0 (CMPEGP0), Comparator Falling Edge Enable Register 0 (CMPEGN0)
924
Interrupt Mask Flag Register 0 (INTMK0)
925
Interrupt Monitor Flag Register 0 (INTMF0)
926
Program Status Word (PSW)
927
Interrupt Servicing Operations
928
Maskable Interrupt Request Acknowledgment
928
Software Interrupt Request Acknowledgment
931
Multiple Interrupt Servicing
931
Interrupt Request Hold
935
Chapter 21 Standby Function
936
Standby Function
936
Registers Controlling Standby Function
937
Standby Function Operation
937
HALT Mode
937
STOP Mode
944
SNOOZE Mode
949
Chapter 22 Reset Function
953
Timing of Reset Operation
955
States of Operation During Reset Periods
957
Register for Confirming Reset Source
959
Reset Control Flag Register (RESF)
959
Chapter 23 Power-On-Reset Circuit
962
Functions of Power-On-Reset Circuit
962
Configuration of Power-On-Reset Circuit
963
Operation of Power-On-Reset Circuit
963
Chapter 24 Voltage Detector
967
Functions of Voltage Detector
967
Configuration of Voltage Detector
968
Registers Controlling Voltage Detector
968
Voltage Detection Register (LVIM)
969
Voltage Detection Level Register (LVIS)
970
Operation of Voltage Detector
973
When Used as Reset Mode
973
When Used as Interrupt Mode
975
When Used as Interrupt and Reset Mode
977
Cautions for Voltage Detector
983
Chapter 25 Safety Functions
985
Overview of Safety Functions
985
Registers Used by Safety Functions
986
Operation of Safety Functions
986
Flash Memory CRC Operation Function (High-Speed CRC)
986
Flash Memory CRC Control Register (CRC0CTL)
986
Flash Memory CRC Operation Result Register
987
CRC Operation Function (General-Purpose CRC)
989
CRC Input Register (CRCIN)
989
CRC Data Register (CRCD)
990
RAM Parity Error Detection Function
991
RAM Parity Error Control Register (RPECTL)
991
RAM Guard Function
992
Invalid Memory Access Detection Control Register (IAWCTL)
992
SFR Guard Function
993
Invalid Memory Access Detection Control Registers 0, 1 (IAWCTL0, IAWCTL1)
993
Invalid Memory Access Detection Function
995
Invalid Memory Access Detection Control Register 0 (IAWCTL0)
996
Frequency Detection Function
997
Timer Input Select Register 0 (TIS0)
998
A/D Test Function
999
A/D Test Register (ADTES)
1001
Analog Input Channel Specification Register (ADS)
1002
Chapter 26 Regulator
1004
Regulator Overview
1004
Chapter 27 Option Byte
1005
Functions of Option Bytes
1005
User Option Byte (000C0H to 000C2H/010C0H to 010C2H)
1005
On-Chip Debug Option Byte (000C3H/010C3H)
1006
Format of User Option Byte
1007
Format of On-Chip Debug Option Byte
1012
Setting of Option Byte
1013
Chapter 28 Flash Memory
1014
Serial Programming Using Flash Memory Programmer
1016
Programming Environment
1017
Communication Mode
1017
Connection of Pins on Board
1019
P40/TOOL0 Pin
1019
RESET Pin
1019
Port Pins
1020
REGC Pin
1020
X1 and X2 Pins
1020
Power Supply
1020
Serial Programming Method
1020
Serial Programming Procedure
1020
Flash Memory Programming Mode
1021
Selecting Communication Mode
1022
Communication Commands
1023
Processing Time for each Command When PG-FP5 Is in Use (Reference Value)
1025
Self-Programming
1026
Self-Programming Procedure
1027
Boot Swap Function
1028
Flash Shield Window Function
1030
Security Settings
1031
Data Flash
1033
Data Flash Overview
1033
Register Controlling Data Flash Memory
1033
Data Flash Control Register (DFLCTL)
1033
Procedure for Accessing Data Flash Memory
1034
Chapter 29 On-Chip Debug Function
1035
Connecting E1 On-Chip Debugging Emulator
1035
On-Chip Debug Security ID
1036
Securing of User Resources
1036
Chapter 30 Bcd Correction Circuit
1038
BCD Correction Circuit Function
1038
Registers Used by BCD Correction Circuit
1038
BCD Correction Result Register (BCDADJ)
1038
BCD Correction Circuit Operation
1039
Chapter 31 Instruction Set
1041
Conventions Used in Operation List
1042
Operand Identifiers and Specification Methods
1042
Description of Operation Column
1043
Description of Flag Operation Column
1044
PREFIX Instruction
1044
Number of Operating Clock Cycles
1045
Hazards Related to Combined Instructions
1046
Operation List
1047
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Renesas RL78/I1A User Manual (59 pages)
Emulator
Brand:
Renesas
| Category:
Computer Hardware
| Size: 1 MB
Table of Contents
Table of Contents
4
Overview
7
Overview of E1/E20/E2 Emulator and E2 Emulator Lite
7
Note on Using E20
7
Configuration of E1/E20/E2/E2 Lite Manuals
8
Supported Devices
9
Overview of the Specifications of the External Trigger Input and Output
11
Assignments of the External Trigger Input and Output Pins
11
Specifications of the External Trigger Inputs and Outputs
12
Designing the User System
13
Connecting the E1/E20/E2/E2 Lite to the User System
13
Installing the Connector on the User System
13
Connecting the User System Interface Cable to the 14-Pin Connector
13
Pin Assignments of the Connector on the User System
17
14-Pin Connector Specifications
17
Recommended Circuits between the Connector and the MCU
19
Connection between the 14-Pin Connector and the RL78 Family Mcus in General
19
Connection between the 14-Pin Connector and the RL78 Family Mcus
21
And the 20- and 24-Pin Versions of the RL78/G12)
21
Connection between the 14-Pin Connector and the RL78 Family MCU (Only the RL78/I1C)
22
Notes on Connection
25
RESET# Pin
25
TOOL0 Pin
28
Gnd
29
VDD
29
Internal Circuits of the Emulator
31
Internal Circuits of the E1 (When the RL78 Family Is Connected)
31
Internal Circuits of the E20 (When the RL78 Family Is Connected)
32
Internal Circuits of the E2 (When the RL78 Family Is Connected)
33
Internal Circuits of the E2 Lite (When the RL78 Family Is Connected)
35
Notes on Designing the User System
36
Isolator for the E1
36
Small Connector Conversion Adapter for the E1
36
Notes on Usage
38
Turning the Power On/Off
38
When a Separate Power Supply Is Used for the User System
38
When Power Is Supplied to the User System from the Emulator (E1/E2/E2 Lite Only)
39
Power Supply Function of the E1/E2/E2 Lite
39
MCU Resources to be Occupied
40
Securing an Area for the Debugging Monitor Program
41
Securing a Stack Area for Debugging
42
Setting an On-Chip Debugging Option Byte
43
Setting a Security ID
44
Setting a Serial Programming Security ID
45
Reset
46
Operation after a Reset
46
SP Value after a Reset
46
Flash Memory
46
Flash Memory Programming by Self-Programming
46
Operation for Voltages and Flash Operation Modes Not Permitting Flash Memory Rewriting
47
Gdidis
47
RESET# Multiplexed Pin
47
Mcus that Are Used in Debugging
48
Usage in Mass-Production
48
Standalone Operation
48
Final Evaluation of the User Program
48
Debug Functions
49
Stepped Execution
49
Go to Here]
49
Debugging in Standby Mode
49
Pseudo-Real-Time RAM Monitor Function or Pseudo-Dynamic Memory Modification Function
50
Start/Stop Functions
50
Emulation of Flash Memory CRC Accumulator Function
51
Break Function
51
Setting and Deleting Events During User Program Execution
51
Trace Function
51
Battery Backup Function
51
RAM-ECC Function
51
Extended Functions of the E2
52
Renesas RL78/I1A User Manual (58 pages)
E1/E20/E2 Emulator, E2 Emulator Lite
Brand:
Renesas
| Category:
Computer Hardware
| Size: 0 MB
Table of Contents
Table of Contents
4
Overview
7
Overview of E1/E20/E2 Emulator and E2 Emulator Lite
7
Note on Using E20
7
Configuration of E1/E20/E2/E2 Lite Manuals
8
Supported Devices
9
Overview of the Specifications of the External Trigger Input and Output
11
Assignments of the External Trigger Input and Output Pins
11
Specifications of the External Trigger Inputs and Outputs
12
Designing the User System
13
Connecting the E1/E20/E2/E2 Lite to the User System
13
Installing the Connector on the User System
13
Connecting the User System Interface Cable to the 14-Pin Connector
13
Pin Assignments of the Connector on the User System
17
14-Pin Connector Specifications
17
Recommended Circuits between the Connector and the MCU
19
Connection between the 14-Pin Connector and the RL78 Family Mcus in General
19
Connection between the 14-Pin Connector and the RL78 Family Mcus (Only the RL78/G11 and the 20- and 24-Pin Versions of the RL78/G12)
21
Connection between the 14-Pin Connector and the RL78 Family MCU (Only the RL78/I1C)
22
Notes on Connection
25
RESET# Pin
25
TOOL0 Pin
28
Gnd
29
VDD
29
Internal Circuits of the Emulator
31
Internal Circuits of the E1 (When the RL78 Family Is Connected)
31
Internal Circuits of the E20 (When the RL78 Family Is Connected)
32
Internal Circuits of the E2 (When the RL78 Family Is Connected)
33
Internal Circuits of the E2 Lite (When the RL78 Family Is Connected)
35
Notes on Designing the User System
36
Isolator for the E1
36
Small Connector Conversion Adapter for the E1
36
Notes on Usage
38
Turning the Power On/Off
38
When a Separate Power Supply Is Used for the User System
38
When Power Is Supplied to the User System from the Emulator (E1/E2/E2 Lite Only)
39
Power Supply Function of the E1/E2/E2 Lite
39
MCU Resources to be Occupied
40
Securing an Area for the Debugging Monitor Program
41
Securing a Stack Area for Debugging
42
Setting an On-Chip Debugging Option Byte
43
Setting a Security ID
44
Setting a Serial Programming Security ID
45
Reset
46
Operation after a Reset
46
SP Value after a Reset
46
Flash Memory
46
Flash Memory Programming by Self-Programming
46
Operation for Voltages and Flash Operation Modes Not Permitting Flash Memory Rewriting
47
Gdidis
47
RESET# Multiplexed Pin
47
Mcus that Are Used in Debugging
48
Usage in Mass-Production
48
Standalone Operation
48
Final Evaluation of the User Program
48
Debug Functions
49
Stepped Execution
49
Go to Here]
49
Debugging in Standby Mode
49
Pseudo-Real-Time RAM Monitor Function or Pseudo-Dynamic Memory Modification Function
50
Start/Stop Functions
50
Emulation of Flash Memory CRC Accumulator Function
51
Break Function
51
Setting and Deleting Events During User Program Execution
51
Trace Function
51
Advertisement
Renesas RL78/I1A User Manual (55 pages)
Brand:
Renesas
| Category:
Computer Hardware
| Size: 0 MB
Table of Contents
Table of Contents
4
1 Overview
7
Overview of E1/E20/E2 Emulator and E2 Emulator Lite
7
Note on Using E20
7
Configuration of E1/E20/E2/E2 Lite Manuals
8
Supported Devices
9
Overview of the Specifications of the External Trigger Input and Output
11
Assignments of the External Trigger Input and Output Pins
11
Specifications of the External Trigger Inputs and Outputs
12
2 Designing the User System
13
Connecting the E1/E20/E2/E2 Lite to the User System
13
Installing the Connector on the User System
13
Connecting the User System Interface Cable to the 14-Pin Connector
13
Pin Assignments of the Connector on the User System
17
14-Pin Connector Specifications
17
Recommended Circuits between the Connector and the MCU
19
Connection between the 14-Pin Connector and the RL78 Family Mcus in General
19
Connection between the 14-Pin Connector and the RL78 Family Mcus (Only the RL78/G11 and the 20- and 24-Pin Versions of the RL78/G12)
21
Connection between the 14-Pin Connector and the RL78 Family MCU (Only the RL78/I1C)
22
Notes on Connection
25
RESET# Pin
25
TOOL0 Pin
28
Gnd
29
VDD
29
Internal Circuits of the Emulator
31
Internal Circuits of the E1 (When the RL78 Family Is Connected)
31
Internal Circuits of the E20 (When the RL78 Family Is Connected)
32
Internal Circuits of the E2 (When the RL78 Family Is Connected)
33
Internal Circuits of the E2 Lite (When the RL78 Family Is Connected)
35
Notes on Designing the User System
36
Isolator for the E1
36
Small Connector Conversion Adapter for the E1
36
3 Notes on Usage
38
Turning the Power On/Off
38
When a Separate Power Supply Is Used for the User System
38
When Power Is Supplied to the User System from the Emulator (E1/E2/E2 Lite Only)
39
Power Supply Function of the E1/E2/E2 Lite
39
MCU Resources to be Occupied
40
Securing an Area for the Debugging Monitor Program
41
Securing a Stack Area for Debugging
42
Setting an On-Chip Debugging Option Byte
43
Setting a Security ID
44
Reset
45
Operation after a Reset
45
SP Value after a Reset
45
Flash Memory
45
Flash Memory Programming by Self-Programming
45
Operation for Voltages and Flash Operation Modes Not Permitting Flash Memory Rewriting
46
Gdidis
46
RESET# Multiplexed Pin
46
Mcus that Are Used in Debugging
47
Usage in Mass-Production
47
Standalone Operation
47
Final Evaluation of the User Program
47
Debug Functions
48
Stepped Execution
48
Go to Here]
48
Debugging in Standby Mode
48
Pseudo-Real-Time RAM Monitor Function or Pseudo-Dynamic Memory Modification Function
49
Start/Stop Functions
49
Emulation of Flash Memory CRC Accumulator Function
50
Break Function
50
Setting and Deleting Events During User Program Execution
50
Trace Function
50
3.10.10 Battery Backup Function
50
3.10.11 RAM-ECC Function
50
3.10.12 Extended Functions of the E2
51
3.10.13 Points for Caution on Using the RL78/G23
51
Renesas RL78/I1A User Manual (53 pages)
16-bit Microcontroller
Brand:
Renesas
| Category:
Microcontrollers
| Size: 2 MB
Table of Contents
Table of Contents
8
Chapter 1 Introduction
10
Main Features of RL78/I1A DC/DC LED Control Evaluation Board
10
System Requirements
11
Package Contents
11
Chapter 2 System Configuration
12
RL78/I1A DC/DC LED Control Evaluation Board
12
Host Computer
12
Power Supply
12
Chapter 3 Board Components
13
Configuration Switch SW2
13
Normal Operation Mode
13
On-Board Debug (OCD) Mode / Flash Programming Mode
14
E1 On-Chip Debug Mode
14
Virtual UART Mode
15
Configuration Switch SW1
15
Configuration Switch SW3
15
Reset Switch SW501
16
External Power Supply CN1
16
DALI Interface Connector CN2
16
DMX512 Interface Connector CN3
16
Infrared Detector U2
16
E1 Emulator Connector J4
17
Programming Connector J3
17
Mini-B USB Interface Connector CN501
17
External Connectors J1 and J2
18
Low Power 32 Khz Resonator Y1
20
RL78/I1A Memory Map
20
Chapter 4 Getting Started
21
Installed Contents
21
Chapter 5 Hardware Installation
22
Chapter 6 Software Installation
23
Chapter 7 How to Use Writeez5 Flash Programming Software
24
Chapter 8 Applilet EZ for HCD Controller
31
General Settings
31
Fix Dimmer Program
33
Variable Dimmer Program
36
Analog Input Dimmer Program
38
DMX512 Dimmer Program
39
DALI Dimmer Program
41
IR Remote Control Dimmer Program
43
Chapter 9 Troubleshooting
45
Chapter 10 Schematics
47
Chapter 11 Bill of Materials
49
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