Packet Error Code (Pec); Smbus Host Notification Protocol (Notify Arp Master Command) - Renesas RX100 Series User Manual

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7-bit slave address

Figure 24.41

SMBus Timeout Measurement

Packet Error Code (PEC)

This MCU incorporates a CRC calculator. The CRC calculator enables transmission of a packet error code (PEC) or

checking the received data of the SMBus in data communication of the RIIC. For the CRC generating polynomials of the

CRC calculator, refer to section 25, CRC Calculator (CRC) .

The PEC data in master transmit mode can be generated by writing all transmit data to the CRC data input register

(CRCDIR) in the CRC calculator.

The PEC data in master receive mode can be checked by writing all receive data to CRCDIR in the CRC calculator and

comparing the obtained value in the CRC data output register (CRCDOR) with the received PEC data.

To send ACK or NACK according to the match or mismatch result when the final byte is received as a result of the PEC

code check, set the ICMR3.RDRFS bit to 1 before the rising edge of the eighth SCL clock cycle during reception of the

final byte, and hold the SCL0 line low at the falling edge of the eighth clock cycle.

In communications over an SMBus, a slave device can temporarily act as a master device to notify the SMBus host (or

ARP master) of its own slave address or to request its own slave address from the SMBus host.

For a product of this MCU to operate as an SMBus host (or ARP master), the host address (0001 000b) sent from the

slave device must be detected as a slave address, so the RIIC has a function for detecting the host address. To detect the

host address as a slave address, set the ICMR3.SMBS bit and the ICSER.HOAE bit to 1. Operation after the host address

has been detected is the same as normal slave operation.

R01UH0822EJ0100 Rev.1.00

Jul 31, 2019

SMBus specification

: Total clock low-level extended period (slave device)

: Total clock low-level extended period (master device)

Measured with the MTU

C-bus Interface (RIICa)

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